HP 3478A Technical Manual page 115

3478A
b. When U503 is addressed (by the CPU) and its
WR (Write) line is low, data from the CPU is sent over
the Data Lines to U503. Line WR gets its low from the
CPU's WR line. With the CPU R line low, its RD (Read)
line is high (which makes U503's RD line high).
Depending on the Address selected (RSO to RS2 at
U503 pins 21 to 23, which are the AO to A2 Address
Lines of the CPU), U503 interprets the data as a
command (ATN, SRQ, etc.) or data (DIOI to D107) and
sends the appropriate information to the HP-IB.
c. When U503 is addressed (by the CPU) and its
RD line is low, U503 is enabled to send data to the CPU
over the Data Lines. Line RD gets its low from the
CPU's RD line. Depending on the Address selected
(RSO to RS2, see previous step), the data may be
remote data from the HP-IB (Program Codes, etc.) and
status information (Remote, Local, etc.).
d. The CPU continuously checks (for HP-IB data)
and updates U503.
7-F68. Rear Panel Switch Circuitry. The Rear Panel
Switch (S501) is an 8 section DIP switch used to select
the 3478A's HP-IB Address, set the Power-On SRQ
Status Bit, set the 3478A to the Talk-Only Mode, and to
set the multimeter to the selected power line frequency.
The switch positions are determined by the CPU when
driver US10 is enabled. The switches that are on (set)
will then bring the corresponding data lines low. The
driver is enabled when line GI (CPU's RD line) and G2
(from flip-flop US06) are both low. The operation of the
switches is as follows:
a. HP-IB Address. The switches marked AO to A4
set the 3478A's HP-IB Address. When the CPU
determines the setting of the switches, it passes the
information to the HP-IB Chip. (Refer to this manual's
Section III for more information on addressing the
3478A.)
b. Power-On SRQ Bit. The switch marked POW
SRQ is used to set the Power-On SRQ Status Bit. The
setting of this switch is also passed on to the HP-IB Chip.
(Refer to Section III of this manual for information on
SRQ.)
c. Talk-Only Mode. When all AO to A4 switches
are on, the 3478A's Talk-Only Mode is selected. Here
again, the CPU sends the necessary information to the
HP-IB Chip.
d. Power Line Frequency. The 50/60Hz switch is
used to set the 3478A for the correct power line
frequency. The CPU determines the position of the
switch and passes it on to the A/D Controller (located in
the Floating Common Circuitry). Dependent on the
position of the switch, the A/D Controller selects the
corresponding Integration Time of the A/D Converter
(1/60 second for 60Hz or 1/50 second for 50Hz, etc.).
7-F-69. Voltmeter Complete. The Voltmeter Complete
pulse is connected to inverter U508C from the PROG
line of U501. The output of U508C is connected to
inverters U508D, E, and F with their outputs connected
to the Voltmeter Complete Terminal. Inverters U508D,
E, and F are used as output buffers and CR504, CR505,
and R538 is the protection circuitry. The voltmeter
complete output is a negative going TTL pulse with a
duration of approximately 1µ S .
7-F-70. External Trigger. An external trigger pulse
(connected to the External trigger Input) is used to trigger
the 3478A, when the multimeter is in the External Trigger
mode. The operation is as follows:
a. When an external trigger pulse is received, J-K
flip-flop U514B is clocked and its Q output goes high.
Since the Q output is connected to the INT input of the
CPU, MT goes high.
b. If the 3478A is configured to a trigger mode
other than the External Trigger mode, no action is taken.
INT remains high.
c. If the 3478A is in the External Trigger mode, the
CPU checks the state of the INT line. If the line is high,
the 3478A is triggered. If the line is low, the CPU keeps
on checking the line until INT goes high or the 3478A is
configured to another trigger mode.
d. When INT goes high (and the 3478A is in the
External Trigger mode), the 3478A triggers and initiates
a measurement cycle.
e. During that time, the HP-IB Chip is addressed
and sends out a trigger pulse (from its TRIG output at
U503 pin 5).
f. The pulse is inverted by flip-flop U514A (which is
configured as an inverter) and resets flip-flop U514B.
The 3478A is now ready for a new trigger pulse.
7-F-71. Isolation Logic
7-F-72. The 3478A's Isolation Logic is used to
communicate between the CPU (U501) in the Chassis
Common Circuitry and the CPU (U462) in the Floating
Common Circuitry. The serial data from U501 (going to
U462) is used to control the operation of Floating
Common Circuitry. This includes instrument set-up
information (Function, Range, etc.) and A/D information
(like changing the integration time). The serial data from
U462 to U501 is the multimeter's measurement data and
certain self-test data (A/D test information). The
following explains the circuitry operation.
7-F-73. The data from USO1 is output from Port P27
(U501 pin 38) and applied to drivers US08A and U508B.
The drivers apply the data to the input (primary) of
transformer T50. The output of T501 is applied to
7-F-20
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