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SCHEMATIC DIAGRAM (FRONT-CD)
R1001
33
R1003
33K
VREF
VREF
C1007
0.01
1
Q1001
PICK UP
COM
COMMON
2SB808
C1008
DT11T3CN
Q1002
100/6.3
2
KTA1504
R1999
C1006
1000P
E
E
3
R1007
82K
000
64
63
62
D
D
R1008
82K
4
1
FIN2
A
R1009
82K
A
APC
5
2
FIN1
R1010
82K
I/V
B
B
E
6
R1011
150K
3
C
C
R1012
150K
7
4
F
BAL
C1019
F
0.22
F
8
5
TB
C1041
GND
0.1
GND
TE-
9
6
R1016
LD
LD
R1998
8.2K
LD
TE
10
7
000
C1022
SVR
VR
1000P
VR
TESI
11
8
MD
MD
MD
C1023
SCI
12
9
C1024
F+
0.22
F+
TH
13
10
C1025
3300P
R1018
T-
T-
TA
14
11
27K
C1026
R1020
T.servo&T.logic
330
0.047
T+
T+
R1019
TD-
15
12
15K
F-
F-
TD
16
13
R1022
6.8K
JP
14
0
TO
15
FD
16
17
18
19
R1023
22K
C1028
1000P
R1027
15K
R1026
C1029
1.5K
22K
0.1
C1030
R1030
0.018
SPINDLE MOTOR
SP+
SP+
M
6
SP-
SP-
24
23
5
SM+
SM+
M
4
IC103
SM-
SM-
LA6548NHL
3
SLED MOTOR
1
2
PUIN-SW
PUIN-SW
2
PUIN-SW
GND
GND
C1102
1
100/10
C1103
0.1
BASE
MECHANISM
R1004
6.8K
61
60
59
58
57
56
55
54
53
52
51
50
49
RFSM
REF
RF
DRF
RF DET
Amp
DEF
VCA
CLK
VCA
RW
Microcontroller
CE
interface
IC101
DAT
LV1605M
CL
INTI
R1043
100K
CLV
HFL
TJP
TES
Spindle servo
Sled servo
TOFF
F.servo&F.logic
TGL
HOLD
DGND
20
21
22
23
24
25
26
27
28
29
30
31
32
C1035
47P
R1032
C1038
18K
3300P
R1036
R1041
180K
150K
R1042
150K
820K
R1045
22
21
20
19
18 17 16 15 14 13
3
4
5
6
7
8
9 10 11 12
- 10 -
R1201
100K
1SS133
D1001
100K
1SS133
D1002
R1204
R1202
100K
C1201
R1203
0.1
10K
64
63
62
61
60
59
58
57
56
55
R1212
330
1
C1018
0.01
EFMI
2
Slice Level
RAM
DRF
A/D
Control
2kx8bits
3
R1213
DEFI
680
CLK
Synchronization
(130KHz)
VCO Clock
4
Detection
C1211
Control
EFM demodulation
RWB
100P
5
C1,C2 ERROR
Subcode
Detection &
Separator
Correction
RWC
6
Q, CRC
Flag
Processing
COIN
7
Port I/F
Interpolation Mute
CQCKB
8
100P
C1212
FSEQ
9
CONTROL
8X Over Sampling
CLVC
Digital Filter
10
CLV Digital
Servo
R1258
100P
100
HFL
C1213
11
LC78605E
JPO
12
1bit DAC
100P
Commander
C1214
TES
13
T0FF
14
LPF
TGL
15
DVSS
16
DVSS
17
18
19
20
21
22
23
24
25
26
C1217
0.1
TO TUNER SECTION
Q1005
KRC102S
C1223 R1209
100P
82
R1210
1K
R1211
1K
54
53
52
51
50
49
DS101
IR
R1256
0.022
DVSS
1K
C1224
1
PUIN
R1254
1K
CLOSE
R1255
100
REMOTE
C1225
R1257
100
FMAMB
0.022
TUNER Counter
R1218
100K
S7
S7
S7
R1219
100K
S6
S6
S6
R1220
100K
S5
LCD
S5
S5
R1221
Controller
100K
S4
S4
S4
&
R1222
Driver
100K
S3
S3
S3
IC102
R1223
100K
S2
S2
S2
R1224
100K
S1
S1
S1
R1225
COM1
100K
C1
C1
Clock
R1226
100K
Generator
COM2
C2
C2
R1227
100K
COM3
C3
C3
R1228
COM4
100K
C4
C4
COM4
27
28
29
30
31
32
1
2
X1001
X1002
16.9344M
32.768K
Q1010
D1003
KRA107S
DAP202K
C1239
1/50
R1239
C1249
R1249
1/50
PR140
400mA
- 11 -
TU_IN
L1007
SYNC_REC
100U
TU_MODE
CD_MODE
L1008
FMAMB
100U
GND
2
2
1
1
2
3
C1226
390P
390P
C1227
390P
C1228
390P
C1229
390P
C1230
390P
C1231
390P
C1232
390P
C1233
390P
C1234
390P
C1237
C1235
100P
TO TUNER GND
390P
C1236
3
4
5
6
7
8
9
10
11
000
LCD11
1K
1K
R1252
560
R1253
560
D1006 D1005
CN112
1N4004 1N4004
06
1
CD+B
2
GND
3
AMUTE
CD_L
4
AGND
5
6
CD_R
This is a basic schematic diagram.
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