Motorola APX 3000 Detailed Service Manual page 15

List of Figures xv
Figure 6-58. 32 kHz clock Vmax with Statistics....................................................................................... 6-61
Figure 6-59. LF Coil when TX and RX .................................................................................................... 6-62
Figure 6-60. LF CW on Spectrum Analyzer ............................................................................................ 6-63
Figure 8-1. Main Board Block.................................................................................................................. 8-3
Figure 8-2. Transceiver (RF) Board Overall Schematic Blocks............................................................... 8-4
Figure 8-3. Antenna Switch Circuit.......................................................................................................... 8-5
Figure 8-4. Transmitter HF Circuit........................................................................................................... 8-6
Figure 8-5. Power Amplifier Circuit.......................................................................................................... 8-7
Figure 8-6. Automatic Level Control Circuit............................................................................................. 8-8
Figure 8-7. Receiver Front End Circuit.................................................................................................... 8-9
Figure 8-8. Receiver Back End Mixer.................................................................................................... 8-10
Figure 8-9. Receiver Back End ............................................................................................................. 8-11
Figure 8-10. Receiver VCO Circuit.......................................................................................................... 8-12
Figure 8-11. Transmitter VCO Circuit...................................................................................................... 8-13
Figure 8-12. Frequency Generation Unit Circuit - 1 of 2......................................................................... 8-14
Figure 8-13. Frequency Generation Unit Circuit - 2 of 2......................................................................... 8-15
Figure 8-14. DC Circuit ........................................................................................................................... 8-16
Figure 8-15. Controller Overall Schematic Blocks................................................................................... 8-17
Figure 8-16. GPS Bluetooth Circuit - 1 of 2 ............................................................................................ 8-18
Figure 8-17. GPS Bluetooth Circuit - 2 of 2 ............................................................................................ 8-19
Figure 8-18. Top Control and JTAG Circuit............................................................................................. 8-20
Figure 8-19. Lighting Control Circuit........................................................................................................ 8-21
Figure 8-20. GCAI and side control......................................................................................................... 8-22
Figure 8-21. Debugging and Display Connector ..................................................................................... 8-23
Figure 8-22. Connectors ......................................................................................................................... 8-24
Figure 8-23. CPLD Circuit ....................................................................................................................... 8-25
Figure 8-24. OMAP User Interface Circuit............................................................................................... 8-26
Figure 8-25. Memory Interface ................................................................................................................ 8-27
Figure 8-26. Audio Circuit ....................................................................................................................... 8-28
Figure 8-27. MAKO/DC Distribution Circuit ............................................................................................. 8-29
Figure 8-28. Serial Interface Circuit......................................................................................................... 8-30
Figure 8-29. Secure Circuit ..................................................................................................................... 8-31
Figure 8-30. Transceiver (RF) Board Layout - Top Side ........................................................................ 8-32
Figure 8-31. Transceiver (RF) Board Layout - Bottom Side ................................................................... 8-33
Figure 8-32. Main Board Block................................................................................................................ 8-61
Figure 8-33. Transceiver (RF) Board Overall Schematic ........................................................................ 8-62
Figure 8-34. Receiver Back End ............................................................................................................. 8-63
Figure 8-35. Frequency Generation Unit Circuit - 1 of 2......................................................................... 8-64
Figure 8-36. Frequency Generation Unit Circuit - 2 of 2......................................................................... 8-65
Figure 8-37. Automatic Level Control Circuit........................................................................................... 8-66
Figure 8-38. VCO Circuit ......................................................................................................................... 8-67
Figure 8-39. Receiver Front End Circuit.................................................................................................. 8-68
Figure 8-40. Receiver Back End Mixer.................................................................................................... 8-69
Figure 8-41. Power Amplifier Circuit........................................................................................................ 8-70
Figure 8-42. DC Circuit ........................................................................................................................... 8-71
Figure 8-43. Antenna Switch Circuit........................................................................................................ 8-72
Figure 8-44. Transmitter HF Circuit......................................................................................................... 8-73
Figure 8-45. Controller Overall Schematic Blocks................................................................................... 8-74
Figure 8-46. GPS Bluetooth Circuit - 1 of 2 ............................................................................................ 8-75
Figure 8-47. GPS Bluetooth Circuit - 2 of 2 ............................................................................................ 8-76
Figure 8-48. Top Control and JTAG Circuit............................................................................................. 8-77
Figure 8-49. Lighting Control Circuit........................................................................................................ 8-78
Figure 8-50. GCAI and side control......................................................................................................... 8-79
Figure 8-51. Debugging and Display Connector ..................................................................................... 8-80