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IC BLOCK DIAGRAM & DESCRIPTION
IC101 LA9241M (Servo Signal Processor)
Vcc1
LDS
LDD
BH1 PH1
64
63
62
61
60
APC
RF DET
FIN2
1
VCA
2
FIN1
I/V
3
E
BAL
VCA
F
4
5
TB
TE
TE-
6
TE
7
8
TESI
T.SERVO & T.LOGICK
9
SCI
TH
10
11
TA
TD-
12
F.SERVO & F.LOGICK
13
TD
14
JP
15
TO
FD
16
17
18
19
FD-
FA
FA-
IC412 TA8229K ( AF Main Amplifier)
IC103 LA6541 (Pick-up Actuator & Motor Driver)
Vcc
Vref
VIN4
VG4
Vo8
24
23
22
21
20
11k
Level
BTL
Sift
Driver
Level
BTL
Sift
Driver
11k
1
2
3
4
5
Vcc
Mute
VIN1
VG1
Vo1
g
LF2
VR REF1 Vcc2
FSS
DRF CE DAT CL CLK
DEF
59
58
57
56
55
54 53
52
51
50
49
REF
˚-com
INTER FACE
SLC
RF Amp
SPINDLE SERVO
SLED SERVO
20
21
22
23
24
25
26
27
28
29
30
31
FE
FE-
AGND
SP
SPI
SPG
SP-
SPD
SLEQ
SLD
SL-
SL+
Vo7
GND
Vo6
Vo5
19
18
17
Vcc
BTL
Driver
BTL
Driver
6
7
8
Vo2
GND
Vo3
Vo4
IC410 BA3314 ( MD Rec. Amplifier)
48
NC
TBC
47
46
FSC
DGND
45
44
SLI
43
SLC
42
RFS-
41
RFSM
40
CV+
39
CV-
38
SLOF
37
HFL
36
TES
TOFF
35
34
TGL
IC411 LC75392 (Pick-up Actuator & Motor Driver)
33
JP+
L1
12
(R1)
32
L2
11
JP-
(R2)
L3
10
(R3)
L4
9
(R4)
18
Vref
CL
14
DI
15
CE
16
IC415 MM1453XF (Q Xpander with Spread Control)
V
CC
VG3
VIN3
CD
RES
16
15
14
13
18
11k
Level
RESET
Sift
Level
Regulator
Sift
11k
9
10
11
12
1
VG2
VIN2 Reg OUT Reg IN
R
IN
- 12 -
4,27
8,23
7,24
6,25
5,26
LATCH
DECODER
CONTROL
SHIFT REGISTER
QF1
QF2
L
V
IN
REF
17
16
15
14
VIRTUAL AUDIO
QXpander
Bias
PROCESSOR
2
3
4
5
PNR
S/Q
DET
Q
IN
3,28
2,29
1,30
13 17
V
V
DD
SS
QF3
QF4
QF5
QF6
13
12
11
10
6
7
8
9
SPC R
L
GND
OUT
OUT
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