Schematic Diagrams - Yamaha CD-1330 Service Manual

A B C

SCHEMATIC DIAGRAMS

DIGITAL 1/3
1
2
DIGITAL (1)
3
4
CB604
5
6
To Loader mechanism ass ' y
CB602
7
CB603
To Loader mechanism ass ' y
8
9
POINT A XL601 (Pin 109 of IC602) POINT B XL603 (Pin 12 of IC604)
10
D E F
1.0
0
1.7
0
1.7
3.3
0
1.7
1.9
1.9
1.9
1.9
1.9
1.9
1.9
1.8
0.2
2.4
2.0
1.8
3.3 1.3
2.4
1.8
1.9
3.3
1.2
1.2
1.3
CD IN
1.7
1.7
0.9
1.5
1.5
0
ACTUATOR DRIVER
1.7
1.7
3.3
0
3.3
1.7
3.3
1.7
0
0 1.7
0
1.7
0 0
7.9
3.5
3.7 1.7
3.7 3.6
3.6 3.7
0.6
3.3
0.6 4.0
0
7.9
IC604: MN103SFB5KYAA
USB microprocessor
INTERFACE
ROM
32 bit
MEMORY 256 KByte
8 KB
FLASH
MICRO-
DMA 4 CH
MEMORY PROCESSOR
USB CORE
DATA
SIF RAM
8 KByte
x 2
I2C
x 1
I/O port
INTERRUPT
34 pcs (3 V type) TIMER
8 pcs (5 V type) CONTROL
8-bit x 4
WDTx1
CLOCK & 16-bit x 2 35 Factor
SYSTEM control
G H I
1.8
1.7
1.5
1.6
1.6
1.7
1.7
1.7
2.0
1.9
CD CONTROLLER
1.8
3.3
3.3
1.6
0
3.3
3.3
1.6
1.6
0
1.3
1.7
1.7
1.7
1.7
1.7
3.4
3.4
1.7
0
A
0
0
(Writing port)
OUT L
IC605: M12L16161A-7TG
512 K x 16-bit x 2 banks synchronous DRAM
V DD 1 50 V SS
DQ0 2 49 DQ15
DQ1 3 48 DQ14
V SSQ 4 47 V SSQ
LWE
Bank Select Data Input Register DQ2 5 46 DQ13
DQ3 6 45 DQ12
LDQM
V 7 44 V
DDQ DDQ
DQ4 8 43 DQ11
512K x 16
DQ5 9 42 DQ10
DQi V SSQ 10 41 V SSQ
512K x 16
CLK
DQ6 11 40 DQ9
DQ7 12 39 DQ8
ADD
V 13 38 V
DDQ DDQ
LDQM 14 37 N.C/RFU
Column Decoder
WE 15 36 UDQM
Latency & Burst Length CAS 16 35 CLK
LCKE RAS 17 34 CKE
CS 18 33 N.C
Programming Register
BA 19 32 A9
LRAS LCBR LWE LDQM
LCAS
LWCBR
A10/AP 20 31 A8
A0 21 30 A7
Timing Register
A1 22 29 A6
A2 23 28 A5
CLK CKE CS RAS CAS WE L(U)DQM
A3 24 27 A4
V DD 25 26 V SS
J K
IC605
SDRAM
(Writing port)
3.3
2.6
2.0 2.6
2.0 2.6
3.4
0
0
USB
3.4
0
MICROPROCESSOR
3.4
3.3 0
B 1.9
0 3.4
1.9
3.4
0
0
0.8
3.4
0
IC601: AN41010A-VF
5-ch. linear driver IC for CD and DVD player
[Sled]
M
VO5+
19
OPI+
22
OPI-
23
Direction
Detection
IC606: R5523N001A-TR-F OPO
24
High side switch IC
· Standby
STBY · Band-gap
V 4 5 V
IN OUT 1
· SVCC
Reset Circuit
FIN
21 27
GATE CURRENT
EN 1 [STBY]
CONTROL LIMIT
"L": All mute
"H": All active
FLAG
DELAY
SGnd SVCC IN5
3 FLG
UVLO
THERMAL
SHUTDOWN
2
GND
★ All voltages are measured with a 10MΩ/V DC electronic voltmeter.
★ Components having special characteristics are marked
and must be replaced
with parts having specifications equal to those originally installed.
★ Schematic diagram is subject to change without notice.
L M N
CD-1330
CURRENT
LIMITER
IC606
3.4
0
0
0.8
0
USB IN
CB609
Page 42 J3
to OPERATION (8)_CB162
[Spindle] [Loading] [Tracking] [Focus] PVCC PGND
M M
VO5- VO3+ VO3-
VO1+ VO1-
VO4+ VO4-
VO2+ VO2-
18 17 16 13 12 11 10 9 8 15 14
PVCC/2
Direction Direction Direction Direction
Detection Detection Detection Detection
VREF
20
Logic
2 26 3 7 6 5 27 28 4
20 kΩ 20 kΩ 18 kΩ 20 kΩ 20 kΩ
PC5 IN4 PC4 IN3R MC2 MC1 IN2 IN1 PC1-2
[PC1-2,PC4,PC5]
MC1 MC2 MODE
"L": mute
"L" "L" Forward
"H": active
"L" "Hi-Z" Brake
"L" "H" Reverse
"H" "L" Stand-by
Note) For use inputting 3-state
"H" "H" Brake MC1 is fixed to L"
● 電圧は、内部抵抗 10MΩの電圧計で測定したものです。
● 印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、
パーツリストに記載されている部品を使用してください。
● 本回路図は標準回路図です。改良のため予告なく変更することがございます。
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