Ic Block Diagram - Yamaha MU100 Service Manual

MU100
µPD63200GS-E1 (XP867A00) DAC (Digital to Analog Converter)
PIN
NAME I/O
NO.
1 4/8F I 4/8 Fs selection
2 D. GND Digital ground
3 16 BIT I 16 bit/18 bit selection
4 D. VDD Digital power supply
5 A. GND Analog ground
6 R. OUT O Channel R output
7 A. VDD
Analog power supply
8 A. VDD

IC BLOCK DIAGRAM

SN74HC14AF-TP1 (XD657A00)
Hex Inverter
1
14
1A
2 13
1Y
3
12
2A
4
11
2Y
5
10
3A
6
9
3Y
7 8
GND
TC74HC245F-T1 (XD603A00)
Octal 3-State Bus Transceiver
1
D1R 20
2 19
A1
18
3
A2
17
4
A3
16
5
A4
15
6
A5
14
7
A6
13
A7 8
12
A8 9
11
GND
10
14
FUNCTION
TC74HC126AF (XS776A00)
Bus Buffer
1G
VDD
1A
6A
2Y
6Y
2G
5A
2A
5Y
4A 2Y
4Y GND
SN74HC273NSR (XH223A00)
Octal D-Type Flir Flop
Vcc
1
CLEAR
G
2
1Q
B1
3
1D
B2 4
2D
B3 5
2Q
6
B4 3Q
7
3D
B5
8
4D
B6
9
4Q
B7
10
GND
B8
PIN
NAME I/O
NO.
9 R. REF
10 L. REF
11 L. OUT O
12 A. GND
13 WDCK I
14 RSI I
15 SI/LSI I
16 CLK I
1
14
Vcc
2 13
4G
3
12
4A
4
11
4Y
5
10
3G
6
9
3A
7 8
3Y
20
VCC
19
8Q
Q Q
CL CL
18
D CK CK D
8D
17
7D
D CK CK D
CL CL
16
Q Q 7Q
15
6Q
Q Q
CL CL
14
D CK CK D 6D
13
5D
D CK CK D
CL CL
12
Q Q 5Q
11
CLOCK
FUNCTION
Channel R voltage reference
Channel L voltage reference
Channel L output
Analog ground
Word clock
Channel R series input
Series input/Channel L series input
Clock
TC74LVC139F9EL (XS048A00)
Dual 2 to 4 Demultiplexer
1 16
1G Vcc
G
2
G 15
1A A 2G
A
3 14
1B B 2A
B
4
13
1Y0 Y0 2B
5 Y0
12
1Y1 Y1 2Y0
Y1
6 11
1Y2 Y2 2Y1
7 Y2
10
1Y3 Y3 2Y2
Y3
8 9
GND 2Y3
TC74HC4051AF-TP (XR056A00)
Triple 2-channel Multiplexer
/Demultiplexer
Switches IN/OUT
1 Y1 V 16 +DC Voltage Supply
DD
Y1
Switches IN/OUT
2 Y0 Y 15 Commons OUT/IN Y
Y0
Switches IN/OUT
3 Z1 X 14 Commons OUT/IN X
Z1
Commons OUT/IN
4 Z X1 13 Swiches IN/OUT X1
Z
Swiches IN/OUT
5 Z0 X0 12 Swiches IN/OUT X0
Z0
Control Inhibit 6 INH A 11 Control Input A
-DC Voltage Supply 7 VEE B 10 Control Input B
GND 8 V C 9 Control Input C
SS