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1
3. BLOCK DIAGRAM AND SCHEMATIC DIAGRAM
3.1 BLOCK DIAGRAM
A
- GEX-6100TV/UC
A
B
CN2701
TV9V
TV9V
10
1
1
TV9V
TV9V
15
3
3
TVV
TVV
6
5
5
TVAR
TVAR
8
16
8
TVAL
TVAL
19
9
9
SDA
SDA
1
18
18
SCL
SCL
7
20
20
TVSL
TVSL
14
17
17
TVSD
TVSD
18
19
19
C
B
CONNECTOR PCB
D
10
1
2
TV TUNER PCB
TV30V REG.
IC 2651
2
4
TV9V
TV30V
TK11819M
VIDEO AMP
TV9V
14
Q2454
CF2451
L2451
Q2451
15
1
L2402
16
10
VR2401
PNS AND
AUDIO BUFFER
Q2501
VR2303
Q2301
IC 2501
8
11
LA2120M
AFOUT
17
SMETER
SIF(2ND)DET
19
SD
IC 2301
LA1145M
MULEV
7
VR2301
GEX-6100TV/UC
2
3
TV5V REG.
Q2601
TV9V
TV5V
75Ω DRIVE
8
Q2455
IC 2751
1
NJM2267V
VIF DET
SAWFIL
9
5
VOUT
PIF2
8
4
1
PIF1
CF2201
VOUTN
3
DET1
IC 2401
TA1290FN
DET2
11
AGCOU
AGCDL
MIX
2ND LOC
CF2351
L2353
Q2363
Q2353
Q2354
L2301
X2351
30.55MHz
8
2
11
10
IFIN
DETIN
IFOUT
SDSEN
18
VR2302
3
4
5
CN2703
4
CN2150
IFAMP
Q2201
8
1
IF out
ANT in
FE2201
2
AGC
9
SDA
10
SCL
TV5V
4
DIVER VIDEO
OUT
ANT1
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