Other Functions - GE L90 Instruction Manual

Line differential relay ur series
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2.3 FUNCTIONALITY
During both startup and normal operation, the CPU polls all plug-in modules and checks that every one answers the
poll. The CPU compares the module types that identify themselves to the relay order code stored in memory and
declares an alarm if a module is either non-responding or the wrong type for the specific slot. When running under nor-
mal power system conditions, the relay processors will have 'idle' time. During this time, each processor performs
'background' self-tests that are not disruptive to the foreground processing.
2
a) ALARMS
The relay contains a dedicated alarm relay, the Critical Failure Alarm, housed in the Power Supply module. This output
relay is not user programmable. This relay has Form-C contacts and is energized under normal operating conditions. The
Critical Failure Alarm will become de-energized if the relay self test algorithms detect a failure that would prevent the relay
from properly protecting the transmission line.
b) LOCAL USER INTERFACE
The relay's local user interface (on the faceplate) consists of a 2 × 20 vacuum florescent display (VFD) and a 22 button key-
pad. The keypad and display may be used to view data from the relay, to change settings in the relay, or to perform control
actions. Also, the faceplate provides LED indications of status and events..
c) TIME SYNCHRONIZATION
The relay includes a clock which can run freely from the internal oscillator or be synchronized from an external IRIG-B sig-
nal. With the external signal, all relays wired to the same synchronizing signal will be synchronized to within 0.1 millisecond.
d) FUNCTION DIAGRAMS
Sample Raw
Value
V
Sample Raw
Value
2-10
Offset
Removal
Charging Current
Offset
Comp.
Removal
dV
dt
Filter
Sample
Hold
PFLL Status
Phase and Frequency
Master
Locked Loop (PFLL)
Clock
Communications
Remote Relay
Interface
Figure 2–3: L90 BLOCK DIAGRAM
L90 Line Differential Relay
Compute
Phaselets
Compute
Phaselets
UR Platform
Phasors
Computations
Compute
Phaselets
Frequency
Deviation
Phase
Deviation
PHASELETS TO REMOTE
PHASELETS FROM REMOTE
Direct Transfer Trip
2 PRODUCT DESCRIPTION

2.3.3 OTHER FUNCTIONS

Disturbance
Detector
67P&N
50P,N&G
51P,N&G
Trip Output
Configurable
Logic
27P
59P
21P&G
87L
Algorithm
831732A3.CDR
GE Multilin

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