Decoder Schematic Diagrams (I/O P.c.b - Hitachi DV-DS163E Service Manual

1 2
1F 2F
S-6 DECODER Schematic Diagram (I/O P.C.B) h
F
To
1E 2E
JACK
(5B,5C)
To
TUNER/
SYSTEM
(8E)
E
To
JACK
(5B)
1D 2D
To
JACK
D
(8C)
1C 2C
C
SW_A_OUT_R
SW_A_OUT_L
1B 2B
B
1A 2A
The following shows the neme of circuit and plug to
which signal is connected and the address:
Name of citcuit
To MAIN
diagram
VIDEO
（3A)
A
Address
PG1001
Name of citcuit To MAIN
AUDIO-L 1
diagram and plug
PG2001
AUDIO-R 2
（3A)
Address
1 2
3 4
3F 4F
O
3E 4E
SAA7137DHS
3D 4D
3C 4C
3B 4B
3A 4A
3 4
5 6
5F 6F
5E 6E
5D 6D
5C 6C
5B 6B
5A 6A
5 6
7 8
7F 8F
7E 8E
To
JACK
(8B)
7D 8D
120
120
120
120
120
To
JACK
(5C)
7C 8C
To
7B 8B
JACK
(5B)
7A 8A
7 8
F
E
D
C
B
A