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1
Port Structure - Overview
Each of the general purpose I/O ports (except Port 5) consists of a Port data register Px
and a Port Direction register DPx. Each port pin is individually bit-addressable and
configurable. The value in the direction register determines whether the corresponding
port pin is configured as output (output driver(s) enabled) or input (pin is in high
impedance state). Some of the ports have an additional Open Drain Control register ODPx
(not implemented in 8xC166 devices). When in open drain output mode, only a logic '0' is
actively driven, while a logic '1' must be provided by an external pullup.
When reading a pin which is configured as input, the logic state of the pin is read, while
reading a pin configured as output returns the value of the corresponding bit in the port
data register. When writing to a port, always the port data register is written to.
After reset, all I/O port pins are configured as inputs, and the port data registers Px
contain the default value 0000h. Port pins which are used as address and/or data bus
from reset on, including the BHE#/WRH# signal (P3.12) for 16-bit data bus modes, are
configured automatically by hardware. All other pins have to be configured by software
when they are to be used as outputs.
2
Initialization of Single Port Pins as Outputs
2.1 Configuration as General Purpose Outputs
When a port pin is to be used as general purpose output, first the initial output value
should be written to the port data register, and then the direction of this pin should be set
to output to achieve a defined transition from the floating state to the actively driven state.
This could be done, e.g. for a Port 1 pin, via the following instruction sequence:
BSET P1.7
; set initial ouput value
BSET DP1.7
; set direction to output
NOP
; or other instruction which does not access P1
BSET P1L.7
; set initial ouput value
EXTR #1
BSET DP1L.7
; set direction to output
NOP
; or other instruction which does not access P1
Note 1: When the direction of a port pin has been changed, the next instruction should
not yet access this pin, since the modification is not effective until after the instruction
following the modifying instruction. Otherwise, the next instruction may still read the pin
status instead of the port data register value, or vice versa, depending whether the
direction has been switched from input to output, or vice versa (pipeline effect, see also
following examples, and section 'Particular Pipeline Effects' in respective User's Manual,
e.g. C167 Derivatives User's Manual, V2.0, p. 4-7).
Semiconductor Group
(syntax for 8xC166 microcontrollers)
(syntax for other C166 microcontrollers)
3 of 7
Port Initialization
and Direction Control
AP164601 1998-02
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