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9.5 3rd Boosting
Run only the booster, perform 3rd boosting in the negative direction for input voltage VI, and generate the
voltage in the VO pin.
In this case, the regulator is not used, so the voltage containing ripple components is generated in the VO pin.
Figure 9.6 shows a connection example.
VO
V
DD
VI
Figure 9.6 Setting conditions
Internal clock
Booster
Regulator
Power-off method
Set the POFF2X pin to level LOW (VI); all circuits will be turned off.
About ripple voltage
For ripple voltage, see Section 9.4.
Other setting conditions
(1) When using the high output mode
Connect the FC pin to VI.
S1F76540M0C Series Technical Manual
(Rev.1.1)
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES
CO
+
+
CI
Figure 9.6 3rd boosting connection example
:
ON (Low output mode)
:
ON
:
OFF
1
1
VO
C2P
2
VRI
C2N
3
V
C3N
REG
4
RV
C1N
5
V
C1P
DD
6
FC
VI
7
TC1
POFF1X
8
TC2
POFF2X
EPSON
16
+
C2
15
14
C1
13
+
12
11
10
9
23
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