HP 11848A Service Manual page 47

Model 11848 A
Service
The output from K12 is routed as follows:
• To the front-panel SPECTRUM ANALYZER connector through a high-pass filter formed by an
RLC network. The filter prevents overloading the RF spectrum analyzer by blocking low-frequency
signals (<50 kHz). (Note that phase noise typically increases as the offset frequency decreases.)
• To switch S8 for further processing on the A3 Analyzer Interface Assembly eventually to reach
the front-panel TO H P 3561A INPUT connector.
• To the front-panel AUX MONITOR connector via Buffer 1. The dc path for the noise signal is
through the 5 kfi resistor. The ac path is through the buffer amplifier and the 0.01 //F capacitor.
The AUX MONITOR port is normally used to study (in the time domain) the quality of the noise
signal being measured by the spectrum analyzer and to assist in obtaining a proper beat note
during initial setup of the sources. The oscilloscope must have a high input impedance (>1 Mfi).
• To the 10 Hz/50 kHz High-Pass Filter on the A3 Analyzer Interface Assembly.
Calibration Signal Routing Circuits
During system hardware calibration (which is normally run annually to generate new calibration
coefficients), the controller runs a series of tests to characterize the transfer function of many of the
circuits in the Interface. The signal sources used during this calibration are the noise source in the
FFT spectrum analyzer (when the frequency is less than 100 kHz) and the tracking generator in the
RF spectrum analyzer (for frequencies to 40 MHz). The noise source in the FFT spectrum analyzer is
also used when the Functional Tests are requested.
The noise source in the FFT spectrum analyzer is connected to the rear-panel NOISE INPUT
FROM H P 3561A SOURCE OUTPUT connector. It is then routed through the A3 Analyzer Interface
Assembly (through a 20 dB Pad) to switch K5. The tracking generator in the RF spectrum analyzer
is connected to the rear-panel INPUT FROM H P 3585A TRACKING GENERATOR connector. It is
then routed through switch K7 and a 35 dB pad (Pad 4) to K5.
Switch K5 routes the calibration input sources to K2 via a series of 3 dB pads and switches (Pad 1,
Pad 2, Pad 3, and switches K4 and K3). Having two switches and three pads improves the isolation in
the open state. K4 and K3 switch together.
Tune-Voltage Conditioning Circuits
Refer now to switch K10, which is at the output of switch K9. When phase noise is measured using
a phase-lock loop, the noise signal from K10 is the signal which, after further processing, tunes the
external voltage-controlled oscillator (VCO) to phase lock it to a second source. The signal path splits
at the output of Buffer 2 to drive two tuning ports: the front-panel and rear-panel TUNE VOLTAGE
OUTPUT connectors. The path to the rear panel is for user convenience, and is inverted to that of
the front-panel.
A fixed 12 dB Amplifier, a programmable amplifier (Gain 1), a fixed 6 dB pad (Pad 4), and a second
programmable amplifier (Gain 2) set the path gain up to the Integrator. The Integrator has very high
gain at low-frequencies to hold the phase detector error near zero in the presence of source drift.
Noise signals in excess of 2.5V (positive or negative) at the input and output of the Integrator are
sensed by the Comparator which trips the Out-of-Lock Flip-Flop. This condition occurs when the two
input sources go out of lock or when the tune voltage exceeds 25% of its entered tuning range or when
a phase transient exceeds 0.25 rad even though the sources are still locked. The flip-flop shorts the
feedback path of the Integrator (forcing it to unity gain) and lights the front-panel OUT OF LOCK
annunciator. The condition of the Out-of-Lock Flip-Flop is read by the FFT spectrum analyzer (used
as a dc voltmeter) via the 46.4 kfi resistor and switch F6 in the A3 Analyzer Interface Assembly. This
readback function is shared by the Overload Flip-Flop.
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