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HiKey960 Development Board Hardware User Manual
GPIO148SPI3DO
SDDAT0/SPI1DOUT
UART0IRDARXD
UART0IRDATXD
GPIO149SPI3CS0N
GPIO146SPI3CLK
SDSCLK/SPI1SCLK
GPIO147SPI3DI
GND
ISPCCLK0MCAM
CLK0/CSI0MCLK
ISPCCLK1SCAM
CLK1/CSI1MCLK
GND
DSI2CLKP
DSI2CLKN
GND
DSI2DATA0P
DSI2DATA0N
GND
DSI2DATA1P
DSI2DATA1N
GND
DSI2DATA2P
DSI2DATA2N
GND
DSI2DATA3P
DSI2DATA3N
GND
USB2DNDP4CON
USB2DNDM4CON
GND
NC
NC
MIPI DSI {0}
The 96Boards specification calls for a MIPI-DSI to be present on the High Speed Expansion Connector.
A minimum of one lane is required and up to four lanes can be accommodated on the connector. The
Hikey960 Development Board implementation supports a full four lane (1.2Gbps/lane) MIPI-DSI
interface that is routed to the High Speed Expansion Connector. The MIPI-DSI signals are directly
connected to DSI-0 of Kirin960.
SDDAT1
SDDAT2
SDDAT3/SPI1CS
SDCMD/SPI1DIN
GND
GND
DSICLK+
DSICLK-
GND
DSID0+
DSID0-
GND
DSID1+
DSID1-
GND
DSID2+
DSID2-
GND
DSID3+
DSID3-
GND
USBD+
USBD-
GND
HSICSTR
HSICDATA
1
2
CSI0C+
3
4
CSI0C-
5
6
GND
7
8
CSI0D0+
9
10
CSI0D0-
11
12
GND
13
14
CSI0D1+
15
16
CCSI0D1-
17
18
GND
19
20
CSI0D2+
21
22
CSI0D2-
23
24
GND
25
26
CSI0D3+
27
28
CSI0D3-
29
30
GND
31
32
I2C2SCL
33
34
I2C2SCL
35
36
I2C3SDA
37
38
I2C3SDA
39
40
GND
41
42
CSI1D0+
43
44
CSI1D0-
45
46
GND
47
48
CSI1D1+
49
50
CSI1D1-
51
52
GND
53
54
CSI1C+
55
56
CSI1C-
57
58
GND
59
60
RESERVED
CSI0CLKP
CSI0CLKN
GND
CSI0DATA0P
CSI0DATA0N
GND
CSI0DATA1P
CSI0DATA1N
GND
CSI0DATA2P
CSI0DATA2N
GND
CSI0DATA3P
CSI0DATA3N
GND
ISPSCL0
ISPSDA0
ISPSCL1
ISPSDA1
GND
CSI1DATA0P
CSI1DATA0N
GND
CSI1DATA1P
CSI1DATA1N
GND
CSI1CLKP
CSI1CLKN
GND
Pull-up vout21v8
15/20
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