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Car Audio Electronic Tuning PLL
Car Audio Electronic Tuning PLL
Frequency Synthesizer
Frequency Synthesizer
LC72151V
LC72151V
Overview
The LC72151V is a PLL frequency synthesizer IC that includes a high-speed locking circuit for FM reception.
This device makes it easy to implement high-performance RDS AM/FM tuners.
Functions
High-speed programmable dividers
FMIN: 10 to 160 MHz pulse swallower
AMIN: 2 to 40 MHz pulse swallower
0.5 to 10 MHz direct divider
IF counters
HCTR: 0.4 to 25 MHZ for FM IF counting
LCTR: 10 to 500 kHz for AM IF counting
1.0 to 20
10
3
Hz for frequency
measurement
Reference frequency
One of 11 frequencies can be selected
(crystal element: 10.25 or 10.35 MHz)
1.3 , 3.125, 5, 6.25, 9 , 10, 12.5, 25, 30 , and 50 kHz
: These frequencies cannot be used when a 10.25
crystal element is used.
Phase comparator
Supports dead zone control
Unlocked state detection circuit
Deadlock clear circuit
Block Diagram
REFERENCE
XIN
DIVIDER
XOUT
SWALLOW COUNTER
FMIN
1/16,1/17 4bits
12bits PROGRAMMABLE
AMIN
DIVIDER
UNIVERSAL
DATA SHIFT REGISTER
HCTR/I-3
COUNTER
LCTR/I-4
POWER
V DD
ON
RESET
V SS
CE DI CL DO I/O-1I/O-2 O-3
69 Car Audio
Active low-pass filter amplifier
Built-in operational amplifier for FM high-speed
locking circuit
Built-in MOS transistor for AM
Crystal oscillator output buffer
I/O ports: general-purpose I/O: 2 pins
Input: 4 pins (maximum)
Output: 3 pins (maximum)
Serial data I/O
Control and communication using the CCB format
Operating ranges
Supply voltage: 4.5 to 5.5 V (VDD)
7.5 to 9.5 V (AVDD)
Operating temperature: -40 to +85 C
Package: SSOP30 (275 mil)
:CCB is SANYO's original bus format.
All bus addresses are managed by
SANYO for this format.
XBUF
PDM1
PHASE DETECTOR
CHARGE PUMP
PDS
PDM2
PDS
TGI1
UNLOCK
DETECTOR
TGI2
TGO
CHARGE PUMP
PDF
for FAST LOCK
AIN2
FAST LOCK UP
AOUT2
LATCH
CONTROL
AV DD
AIN1
-
+
CCB
AREF
I/F
AV SS
AOUT1
RDS Signal-Processing System-on-Chip IC
RDS Signal-Processing System-on-Chip IC
LC72722/M/PM
LC72722/M/PM
Overview
The LC72722, LC72722M, and LC72722PM are system-on-chip signal demodulation and processing ICs for
the European Broadcasting Union (EBU) Radio Data System (RDS) and the US National Radio System Committee
(NRSC) Radio Broadcast Data System (RBDS).
These ICs integrate, on the same chip, bandpass filter, demodulation, synchronization, and error correction
circuits as well as buffer RAM, and provide effective error correction using soft decision error correction.
Functions
Bandpass filter: switched capacitor filter (SCF)
Demodulation: RDS data clock regeneration and demodulated data reliability information
Synchronization: Block synchronization detection with variable forward and backward
protection conditions
Error correction: soft decision and hard decision error correction
Buffer RAM: 24 blocks (about 500 ms) of data and flag memory
Data I/O: CCB interface (power on reset)
Packages:(LC72722):DIP24S(300mil)
(LC72722M):MFP24S(300mil)
(LC72722PM):MFP24(375mil)
Block Diagram
V REF
+5V
FLOUT
CIN
Vdda
REFERENCE
VOLTAGE
Vssa
V REF
57kHz
BPF
MPXIN
ANTIALIASING
SMOOTHING
(SCF)
FILTER
FILTER
DO
RAM
ERROR CORRECTION
CL
CCB
(24 BLOCK DATA)
DI
CE
T1
MEMORY CONTROL
T2
TEST
T3 to T7
:CCB is SANYO's original bus format.
All bus addresses are managed by
SANYO for this format.
+5V
Vddd
+
CLOCK
PLL
RECOVERY
-
(57kHz)
(1187.5Hz)
Vssd
DATA
RDS-ID
DECODER
SYNC
SYNC/EC CONTROLLER
(SOFT DECISION)
SYR
CLK(4.332MHz)
SYNC
SYNC
DETECT-1
DETECT-2
OSC/DIVIDER
X IN
X OUT
70 Car Audio
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