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A 25 MHz crystal provides the
clock required by the Ethernet
controller, PHY.
The RTC oscillator uses a
32.768 kHz crystal.
26
GFK-2896
For public disclosure
4.1.9 Clocks
Most of the system clocks are generated from a 48 MHz crystal by an integrated clock
generator within the G-Series SoC. The following clock groups are provided by the clock
generator:
Internal clocks are supplied to the CPU cores, cache, GPU, peripheral controllers, and
the intra-chip buses.
Memory clock is supplied to the DDR3L memory as 533, 667, or 800 MHz, depending
on memory configuration.
100 MHz Differential PCIe Reference clock is supplied to the Ethernet controller,
and to the carrier board.
33.33 MHz LPC clock is supplied to the FPGA LPC interface, and to the carrier board.
Note The
power sequencing
separate 25 MHz oscillator powered on the standby rail prior to the main clock generator
starting.
4.1.10 Real-Time Clock and CMOS RAM
The G-Series SoC provides the real-time clock (RTC) and CMOS RAM functions. This is
powered from the VCC_RTC pin, and must be supplied by the carrier prior to ramp up of
the standby and main power rails for proper board operation. Battery back-up, if required,
must also be implemented on the carrier board.
4.1.11 LPC Bus
A standard low pin-count bus, including serial interrupt request, is hosted by the G-Series
SoC, and connects to on-board peripherals within an FPGA and to the COM Express
connector. The bus operates at 33.33 MHz.
4.1.12 SMBus
The mCOM10-L1500 contains two system management buses (SMBus): SMB0 and
SMB1. Both are controlled by the G-Series SoC. SMB0 connects to the memory SPD and
the debug header, and is located on the S0 (main) power domain. SMB1 connects to the
Ethernet controller and the COM Express connector, and is located on the S5 (standby)
power domain.
and startup
supervision
logic in the FPGA is clocked with a
Mini COM Express Type 10 Module mCOM10-L1500
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