Option 001, Time Standard - HP 5065A Operating And Service Manual

Model 5065A
Circuit Diagrams, Theory, and Maintenance
Figure 4-2. Rb
87
Absorption Cell Output
LIGHT OUTPUT
FROM Rb°
ABSORPTION
CELL
*\
137Hz
MOD
FREO
FT
1ST HARMONIC
2ND HARMONIC
TO
AC AMP
CENTER RESONANCE =
6.834685 GHz
4-12. The A6 1 MHz Frequency Divider processes 5 MHz
in a regenerative frequency divider to produce 1 MHz.
One MHz outputs go to the front and rear 1 MHz output
jacks and also to A4, 100 kHz Frequency Divider. A
start circuit, which includes the START-AUTO-START
switch, provides for manual or automatic starting of the
regenerative divider circuit. Another A6 output is 1 MHz
from a buffer amplifier which feeds the A5 Digital
Divider Assembly.
4-13. The front panel START-AUTO-START switch per­
mits manual starting so that frequency-divider circuits
will not restart automatically. In the AUTO-START
position, this switch provides for automatic restarting
of divider circuits so the 5065A instrument can serve as
a frequency source. When the Option 001 Time Stand­
ard is installed, a mechanical lock prevents using the
AUTO-START position.
4-8. The A12 RVFR photodiode output is applied to
A7J1. This signal contains a fundamental frequency
of 137 Hz, a second harmonic of 274 Hz and is pro­
portional to the frequency error. The composite input
signal is amplified and then the 137 Hz and 274 Hz
signals are separated, filtered and amplified. The 137
Hz output at A7("Y") is connected A8(18) and the
274 Hz output at A7("WBO") is connected to the 2ND
HARMONIC position of Ml via A17(13).
4-14. The A4 Frequency Divider processes the A6 1 MHz
output through a decade divider to produce 100 kHz at
front and rear 100 kHz output jacks
4-9. In A8 Phase Detector, a reference 137 Hz signal
is compared in phase with the 137 Hz input signal. The
resulting dc output is either positive or negative de­
pending on the phase of the 137 Hz input. Also, the dc
output amplitude is proportional to the 137 Hz input
amplitude. This dc output goes to the ERROR position
of the CIRCUIT CHECK meter and to A9 Integrator
Assembly.
4-10. In A9 Integrator Assembly, the dc error signal is
amplified and integrated to slow feedback loop response.
Connecting to this assembly is the FUNCTION switch
which opens the control loop so that the A10 Oscillator
can operate independently. In this LOOP OPEN
position, A9 output is shorted to the input and the error
signal is not amplified. With the FUNCTION switch at
OPERate, the amplified and integrated dc control volt­
age connects to a varactor diode in A10 quartz oscillator
circuit to correct the 5 MHz output frequency.
4-11. One 5 MHz output from A10 Oscillator is routed
through a power amplifier in A3 Multiplier Assembly to
A13 Buffer Amplifier. In A13 module, power amplifiers
feed A1 Synthesizer and the front and rear 5 MHz output
jacks. The second 5 MHz output from A10 Oscillator
supplies A61 MHz Frequency Divider.
4-2
4-15. OPTION 001, TIME STANDARD
4-16. Time Standard Option 001 consists of A5 Digital
Divider, A16 Digital Divider Power Supply, and the front
panel mechanical clock. The A5 module processes 1
MHz to produce digitally delayed 1 PPS output pulses.
A SYNC INPUT jack at the rear enables the user to
synchronize with an extternal reference. Incremental
delay of the 1 PPS output is set by the TIME DELAY
thumbwheel switches. Continuously-variable delay of
the 1 PPS output, that is processed by the A16 module
for a "tick" pulse output at the front-panel 1 PPS jack,
is set by the 0-1 psec TIME DELAY adjustment.
4-17. An additional A5 control is the SYNC switch. To
synchronize the 1 PPS output with a reference pulse, the
SYNC pushbutton is depressed for at least 1-second and
then released. If a sync pulse is connected to the rear
SYNC INPUT jack, one reference pulse will enterthe syn­
chronizing circuits during the 1-second interval. This
pulse will reset the digital divider. The output 1 PPS "tick"
pulse from the 1 PPS front panel jack will then be in sync
with the reference pulse.