Interrupt Registers; Table 5-8 Interrupt Summary Registers - GE C2K Hardware Reference Manual

5.2.2 Interrupt Registers

Table 5-8 lists the interrupt registers included in the FPGA that provide interrupt status and inter-
rupt blocking (masking).
Interrupt summary registers
Table 5-8
Offset Register
0x20 Interrupt Mask Reg 1
0x22 Unused
0x24 Interrupt Status Reg 1
0x26 Unused
0x28 SMI Mask
0x2A SMI Status
Interrupt Mask Register 1
The Interrupt Mask Register 1 provides interrupt masking for the PMC sites and integrated
USART.
Address offset: 0x20
Access: Read/write
Bits Field
15 PMC1_CPCI_INTA_MSK
14 PMC1_CPCI_INTB_MSK
13 PMC1_CPCI_INTC_MSK
12 PMC1_CPCI_INTD_MSK
5-11
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Description
Provides interrupt masking for PMC sites and
integrated USART ports.
Unused
Provides interrupt status for PMC sites and inte-
grated USART ports.
Unused
Provides masking for inputs to CPU_SMI#.
Provides status of inputs to CPU_SMI#.
Default
0x1 PMC1/[CPCI Interrupt A or CPCI_BRG_P] Interrupt Mask— blocks
(masks) INTA from the PMC module installed on PMC1. When the
Board is in the system slot, the CPCI_BRG_P_INT signal is or'ed
with the PMC1 INTA signal. When the board is not in the system
slot, the CPCI INTA signal is or'ed with the PMC1 INTA signal .
0 = enable interrupt
1 = disable (mask) interrupt
Xx7 PMC1 INTB Mask—blocks (masks) INTB from the PMC module
installed on PMC1. Each bit indicates a logic or of the PMC and
CPCI interrupt. When the board is not in the system controller slot,
the CPCI interrupts are disabled.
0 = enable interrupt
1 = disable (mask) interrupt
PMC1 INTB Mask—blocks (masks) INTB from the PMC module
installed on PMC1. Each bit indicates a logic or of the PMC and
CPCI interrupt. When the board is not in the system controller slot,
the CPCI interrupts are disabled.
0 = enable interrupt
1 = disable (mask) interrupt
PMC1 INTB Mask—blocks (masks) INTB from the PMC module
installed on PMC1. Each bit indicates a logic or of the PMC and
CPCI interrupt. When the board is not in the system controller slot,
the CPCI interrupts are disabled.
0 = enable interrupt
1 = disable (mask) interrupt
Description
C2K User's Guide
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