Table of Contents
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A
B
C
D
E
F
SCHEMATIC DIAGRAMS
WXA-50
MAIN 1/3
Page 49
K2
to MAIN (2)_CB601, 602
W X A o n l y
M A I N ( 2 )
1
C 5 0 2
0 . 0 1 / 2 5 0
R Y 5 0 1
D G 5 D 1 - O ( M ) - I I
2
R 5 0 1
1 / 2 P 3 M
C 5 0 1
P
0 . 1 / 2 7 5
3
L 5 0 1
s 5 0 1
4
5
6
7
8
9
D G N D
P L 5
1 3 3
P L 6
1 3 4
P L 7
1 3 5
C 1
D V D D 3
+ 3 . 3 M
1 3 6
10
D V S S
D G N D
1 3 7
0 . 1 / 1 0 ( B J )
P B 0
D I A G _ C H E C K
T P 2
1 3 8
T P 3
P B 1
1 3 9
+ 3 . 3 D S P
R 2
P B 2
D G N D
1 4 0
P R Y _ C T R L
1 0 0 K
7 4 L V C 2 G 1 7 G W , 1 2 5
P B 3
1 4 1
I C 4
5
P R T _ O C
R 8 6
1
6
R 3
P B 4
1 4 2
V +
1 0 0
1 0 0
P R T _ T H M
R 8 7
3
4
R 4
P B 5
1 4 3
V -
2
R 5
1 0 0
1 0 0
I C 4
P B 6
D G N D
1 4 4
7 4 L V C 2 G 1 7 G W , 1 2 5
1 0 0 K
P B 7
11
1 4 5
D G N D
C 2
D V D D 3
+ 3 . 3 M
1 4 6
D V S S
D G N D
1 4 7
0 . 1 / 1 0 ( B J )
P B 8
+ 3 . 3 M S _ P O N
1 4 8
D C _ T R G _ O U T
P B 9
1 4 9
R 6
P C 0
D G N D
1 5 0
1 0 0 K
S W _ W L _ A L L
P C 1
1 5 1
S W _ W L _ B T
P C 2
1 5 2
S W _ M O D E
P C 3
1 5 3
12
R 7
T E S T
D G N D
1 5 4
1 0 0 K
P C 4
1 5 5
R 8
P C 5
+ 3 . 3 M
1 5 6
1 0 0 K
P C 6
1 5 7
P C 7
1 5 8
N C P U _ N _ I N T
I N T B
1 5 9
P C 9
1 6 0
N C P U _ A M U T E
T B 6 I N 0
1 6 1
13
P C 1 1
1 6 2
P K 0
1 6 3
C 3
D V D D 3
+ 3 . 3 M
1 6 4
No replacement part available.
D V S S
D G N D
1 6 5
0 . 1 / 1 0 ( B J )
N C P U _ A D T _ M U T E
P K 1
1 6 6
N C P U _ V B U S D R V
P K 2
1 6 7
N C P U _ S P I _ N _ C S
P K 3
1 6 8
N C P U _ P H O L D
P F 1
1 6 9
3 3 X 4
N C P U _ P O N
R 1
P F 2
14
1 7 0
N C P U _ N _ R S T
R 9
P K 6
1 7 1
n o _ u s e
U S B _ V B U S _ P O N
R 1 0
P K 7
1 7 2
3 3
B O O T
1 7 3
S C 7 T X D
1 7 4
S C 7 R X D
1 7 5
P M 2
1 7 6
15
7
6
8
5
7
6
8
5
1
2
3
4
1
2
3
4
16
17
IC501: R1191H090B-T1-FE
Voltage regulator
ECO
4
Thermal Protection
18
V
DD
5
1
V
OUT
Vref
Pin No.
Symbol
1
2
3
4
Peak
19
5
Short
Current
Reverse
Protection
Protection
Detector
CE
GND
3
2
G
H
I
J
K
Notes)
Safety measures
• Some internal parts in this product contain high voltages and are dangerous. Be sure to take safety measures during servicing, such as wearing insulating gloves.
• Note that the capacitors indicated below are dangerous even after the power is turned off because an electric charge remains and a high voltage continues to exist there.
Before starting any repair work, connect a discharging resistor (5 k-ohms/10 W) to the terminals of each capacitor indicated below to discharge electricity.
The time required for discharging is about 30 seconds per each.
C510–512 on MAIN (1) P.C.B.
P O W E R
2 P 1 7 0 M M V H - 5 2 9 8 T
2 P 1 7 0 M M V H - 5 2 9 8 T
Page 49
K16
A M P
to Amplifier and power module_P100
Q 5 0 2
R A L 0 3 5 P 0 1
4
5
6
3
2
1
P R I M A R Y
S E C O N D A R Y
R 5 1 0
Q 5 0 4
3 . 3 K
C R 5 4 2 P
D 5 0 3
DC-DC converter
R 5 1 1
1 S S 3 5 5 V M
5 6 0
+ 1 5 V
D r a i n
( N C )
T H 5 0 1
Q 5 0 1
N T P A D 5 R 1 L D N B 0
14.9
+ D C I N
S e c W
D T C 0 1 4 E U B T L
L 5 0 2
D 5 0 5
V c c
+ D C O U T
1 . 5 U H
( N C )
- D C I N
N C
U D Z V 6 . 2 B
V c c w
- D C O U T
F B
C 5 0 4
6 8 0 P / 2 5 0
5 k-ohms
10 W
+ 5 V
W X A o n l y
5 k-ohms
5 k-ohms
10 W
10 W
D 5 0 2
1 S S 3 5 5 V M
Q 5 0 3
D 2 7 0 4 ( K )
R 5 0 8
2 . 2 K
(For factory)
Q 1
D I A G _ U A R T
H N 4 B 0 1 J E ( T E 8 5 L ,
B 1
C 1
+ 3 . 3 S
E
L M T _ P S 1
B 2
C 2
D G N D
3 . 0 V
+ 3 . 3 S
+ 3 . 3 S
+ 3 . 3 S
+ 3 . 3 S
+ 3 . 3 S
Q 2
H N 4 B 0 1 J E ( T E 8 5 L ,
B 1
C 1
0 . 3 V
R 3 5
E
L M T _ P S 2
R 3 6
1 K
1 K
D G N D
B 2
C 2
R 8 4
1 0 0
D G N D
D G N D
D G N D
D G N D
D G N D
C 1 7
C 1 3
C 2 0
1 0 0 0 P ( B )
C 1 1
C 1 8
1 0 0 0 P ( B )
1 0 0 0 P ( B )
C 1 4
C 2 1
1 0 0 0 P ( B )
1 0 0 0 P ( B )
C 1 2
C 1 9
1 0 0 0 P ( B )
1 0 0 0 P ( B )
1 0 0 0 P ( B )
1 0 0 0 P ( B )
D G N D
D G N D
C 6
C 6 1
D G N D
1 / 2 5
0 . 1 / 1 0 ( B J )
A V D D 3
8 8
P N 1
S E L _ D A C I N
8 7
P N 0
S E L _ P C M / D S D
8 6
P G 1 1
M T _ N _ B U S
8 5
P G 1 0
M T _ N _ P R E
8 4
P G 9
8 3
P G 8
D S P _ N _ R S T
8 2
I 2 C 1 S C L
D S P _ S C L
8 1
I 2 C 1 S D A
D S P _ S D A
8 0
I 2 C 0 S C L
D A C _ S C L
7 9
I 2 C 0 S D A
D A C _ S D A
7 8
P G 3
D A C _ R S T
7 7
P G 2
7 6
MICROPROCESSOR
P G 1
S P R Y _ C T R L
7 5
P G 0
+ 3 . 3 S _ P O N
7 4
I N T A
R 3 8
A C P W R _ D E T
7 3
C 2 4
1 0 0
D V S S
7 2
D G N D
C 2 7
D V D D 3
7 1
+ 3 . 3 M
0 . 1 / 1 0 ( B J )
P E 8
1 0 0 0 P ( B )
7 0
P E 7
R 3 4
B T L _ S y n c
6 9
+ 3 . 3 M
P E 6
1 0 0 K
D S P _ P O N
6 8
P E 5
A M P _ B T L
6 7
I C 1
P F 1 3
R 3 0
A M P _ E N
T M P M 4 6 2 F 1 5 F G ( A D
6 6
3 3
I N T 8
R E M _ I N 1
6 5
W r i t t e n :
Y H 7 0 5 * 0
P F 1 1
A O U T _ S E L
B l a n k
:
Y H 1 2 8 A 0 T M P M 4 6 2 F 1 5 F G ( A D B B )
6 4
P F 1 0
D I R _ N _ R S T
6 3
P F 9
6 2
C 2 5
D V S S
6 1
D G N D
R 3 7
3 3 X 4
D V D D 3
D I R _ N _ C S
6 0
+ 3 . 3 M
0 . 1 / 1 0 ( B J )
S C 1 S C K
D I R _ S C K
5 9
S C 1 R X D
D I R _ M I S O
5 8
S C 1 T X D
D I R _ M O S I
5 7
T B 9 I N 0
D I R _ N _ I N T
5 6
サービス部品供給なし
S C 0 R X D
2 3 2 C _ D B G _ M I S O
5 5
S C 0 T X D
R 3 1
2 3 2 C _ D B G _ M O S I
5 4
3 3
S C 6 S C K
R 2 9
5 3
3 3 X 4
S C 6 R X D
5 2
S C 6 T X D
5 1
P M 1 1
5 0
R E S E T
R 3 2
M C P U _ N _ R S T
4 9
1 0 0
X T 2
M C P U _ N _ R S T
4 8
C 2 3
M O D E
4 7
1 0 0 0 P ( B )
X T 1
4 6
D G N D
N M I
R 2 8
4 5
1 0 K
+ 3 . 3 M
E E P _ M I S O
E E P _ S C K
E E P _ N _ C S
E E P _ M O S I
+ 3 . 3 M
C 1 5
+ 3 . 3 M
E E P R O M
R 3 3
S
1 0 K
V C C
Q
H O L D
+ 3 . 3 M
EEPROM
R 1 9
W
C
1 M
V S S
D
D G N D
M 9 5 3 2 0 - R M N 6 T P
X L 1
2
C 2 6
D G N D
D G N D
0 . 1 / 1 0 ( B J )
1
3
Y C 4 0 8 B 0 : R e n e s a s R 1 E X 2 5 0 3 2 A S A 0 0 I
1 2 M H Z
Y D 9 0 2 B 0 : S T M i c r o M 9 5 3 2 0 - R M N 6 T P
IC502: BD7541G-TR
Input/output full swing CMOS operational amplifier
IN+
1
5
VDD
+
Description
VSS
2
V
OUT
Output Pin
–
GND
Ground Pin
IN-
3
4
OUT
CE
Chip Enable Pin ("H" Active)
ECO
Low Power / Fast Mode Changer Pin
V
Input Pin
DD
L
M
N
O
P
Q
D 5 0 8
R 5 1 4
7.9
+ 7 A
R F 0 8 1 M 2 S T R
2 . 2
T 5 0 1
1
1 0
A G N D _ D A
2
9
R 1 1 9 1 H 0 9 0 B - T 1 - F
+ 1 0 V
I C 5 0 1
3
8
E C O
C E
4
7
G N D
11.6
D 5 0 9
6
L 5 0 3
V D D
V O U T
9.0
+ 9 V
B L M 2 1 P G 6 0 0 S N 1 D
R F 0 8 1 M 2 S T R
S H 1 0 6 0 2 B
A G N D
C 5 2 1
n o _ u s e
D 5 1 0
L 5 0 4
B L M 2 1 P G 6 0 0 S N 1 D
R F 0 8 1 M 2 S T R
V + 5
-11.6
- 1 0 V
V - 2
-9.0
- 9 V
D G N D
Q 5 0 5
A 1 0 3 7 A K ( Q / R / S )
R 5 2 4
R 5 2 5
3 3 K
1 8 K
C 4 7
2 A
L 3
0 . 1 / 1 6
L 4
L 5
T P 6 3
5.1
+ 5 V
B L M 2 1 P G 6 0 0 S N 1 D
3 . 3 U H
B L M 2 1 P G 6 0 0 S N 1 D
8
7
6
5
9
I C 6
1
2
3
4
F I N
D G N D
+ 3 . 3 M
+ 3 . 3 S
+ 5 V
+ 5 V
I C 7
I C 8
R P 1 3 0 K 3 3 1 D - T R
R P 1 3 0 K 3 3 1 D - T R
G
G
C E / C E
G N D
C E / C E
G N D
V D D
V O U T
V D D
V O U T
D G N D
R 8 2
D G N D
1 0 0
D G N D
+ 3 . 3 S
Q 4
A 1 5 7 6 U B T L R
M T _ N _ P R E
R 4 6
4 . 7 K
D G N D
R 5 1
P r e o u t
M T _ P R E
4 7 0
D G N D
Q 5
A 1 5 7 6 U B T L R
M T _ N _ B U S
R 4 7
4 . 7 K
R 5 2
B u s O u t
M T _ B U S
4 7 0
D G N D
- 9 V
+ 3 . 3 M
Q 3
+ 3 . 3 M
R 6 2
4 7 X 4
S W D I O
S W D I O
S W C L K
D T C 0 4 4 E U B T L
S W V
S W C L K
D G N D
+ 3 . 3 M
7
6
8
5
S W V
D e s t i n a t i o n P a r t L i s t
1
2
3
4
+ - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - +
4 7 X 4
M C P U _ N _ R S T
R E S E T
|
s x x
|
L O C A T I O N
+ - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - +
B O O T
B O O T
|
s 5 0 1
|
L 5 0 1
|
|
2 3 2 C _ D B G _ M I S O
R X D
+ - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - +
2 3 2 C _ D B G _ M O S I
T X D
R 6 3
D G N D
C B 4
+ 3 . 3 M
+ 3 . 3 M
n o _ u s e
+ 3 . 3 M
D 5
I C 3
R B 5 2 1 S - 3 0 T E 6 1
R 5 0
R 5 3
2
4
O U T
C D
1 M
1 K
S N 7 4 L V C 1 G 1 7 D C K R
V D D
C 3 2
D 1
+ 3 . 3 M
G N D
N C
1 0 / 1 0
R 3 1 1 6 N 2 7 1 A - T R - F
1 S S 3 5 5 V M
D G N D
5
V +
R e s e t D e l a y
7 0 m s e c
D G N D
V -
3
D G N D
R E S I S T O R
C A P A C I T O R
R E M A R K S
P A R T S
N A M E
R E M A R K S
N O
M A R K
E L E C T R O L Y T I C
C A P A C I T O R
N O M A R K
S O L I D E L E C T R O L Y T I C
C A P A C I T O R
N O
M A R K
C E R A M I C
C A P A C I T O R
D G N D
C E R A M I C
T U B U L A R
C A P A C I T O R
P O L Y E S T E R F I L M
C A P A C I T O R
P O L Y S T Y R E N E
F I L M
C A P A C I T O R
M I C A
C A P A C I T O R
7
6
8
5
7
6
8
5
7
6
8
5
P
P O L Y P R O P Y L E N E
F I L M
C A P A C I T O R
S E M I C O N D U C T I V E C E R A M I C C A P A C I T O R
L 1
1
2
3
4
1
2
3
4
1
2
3
4
P O L Y P H E N Y L E N E
S U L F I D E
F I L M
S
B K P 1 0 0 5 H S 6 8 0 - T
C A P A C I T O R
L 2
B L M 2 1 P G 6 0 0 S N 1 D
M A I N ( 3 )
Page 49
K9
to MAIN (3)_CB701
Details of colored lines
Red / full line:
Power supply (+)
Red /dashed line:
Power supply (-)
Orange:
Signal detect
Yellow:
Clock
Green:
Protection detect
Brown:
Reset signal
Blue:
Panel key input
R
S
T
U
V
W
注意 )
安全対策
・ この製品の内部には高電圧部分があり危険です。 修理の際は、 絶縁性の手袋を使用するなどの安全対策を行ってください。
・ 下記のコンデンサには電源を OFF にした後も電荷が残り、 高電圧が維持されており危険です。 修理作業前に放電用抵抗 （5 kΩ/10 W） を
下記の各コンデンサの端子間に接続して放電してください。 放電所用時間は各々約 30 秒間です。
MAIN （1） P.C.B. の C510 〜 512
M A I N ( 1 )
5 0 1 - 6 0 0
MAIN (1)
M A I N ( 1 )
D i g i t a l 1 / 2
1 - 2 0 0
MAIN (1)
to MAIN 2/3
D i g i t a l 2 / 2
D G N D
T H M _ M O N
R 6 5
1 0 0
R E M _ I N 2
S W _ W L _ A L L
R 7 0
1 0 0
S W _ W L _ B T
R 7 1
1 0 0
R 7 2
D C _ T R G _ O U T
D C _ T R G _ O U T
R 7 5
1 0 0
D C _ T R G _ I N
1 0 0
R 7 6
1 0
+ 3 . 3 M
1 0 P 1 0 0 M M B & C
D G N D
D G N D
D 8
W X A o n l y
R 7 3
A C P W R _ D E T
1 0 0
1 S S 3 5 5 V M
M C P U _ N _ R S T
Q 7
D T C 0 4 4 E U B T L
R 7 4
C 4 0
D 9
P R T _ P S 2
R 4 9
1 0 0
1 / 1 0
1 0 0 K
1 S S 3 5 5 V M
C 4 1
3 P 6 0 M M B & C B L
1 / 1 0
D G N D
Q 6
F A N _ C T R L
R 9 1
F A N _ L O C K
1 0
R 9 0
1 0 0
D G N D
A M P _ O L V
S P R Y _ C T R L
R 5 9
1 0 0
|
J
|
U C
|
T
|
K
|
A
|
B G
|
L
|
V S
|
W K 5 8 6 3 0
|
W K 5 8 6 3 0
|
Z V 9 4 0 6 0
|
Z V 9 4 0 6 0
|
Z V 9 4 0 6 0
|
Z V 9 4 0 6 0
|
Z V 9 4 0 6 0
|
W K 5 8 6 3 0
|
1 3 M H
|
1 3 M H
|
6 0 M H
|
6 0 M H
|
6 0 M H
|
6 0 M H
|
6 0 M H
|
1 3 M H
W X A o n l y
L A 1
L A B E L N A
W P 4 1 6 5 0
N O T I C E
( m o d e l )
J
J A P A N
P A R T S
N A M E
C A R B O N
F I L M R E S I S T O R
( P = 5 )
U
U . S . A
C
C A N A D A
C A R B O N
F I L M R E S I S T O R
( P = 1 0 )
R
G E N E R A L
M E T A L
O X I D E F I L M R E S I S T O R
T
C H I N A
M E T A L
F I L M
R E S I S T O R
K
K O R E A
M E T A L
P L A T E R E S I S T O R
F I R E
P R O O F C A R B O N
F I L M R E S I S T O R
A
A U S T R A L I A
B
B R I T I S H
C E M E N T
M O L D E D R E S I S T O R
G
E U R O P E A N S T A N D A R D
S E M I
V A R I A B L E
R E S I S T O R
L
S I N G A P O R E
C H I P R E S I S T O R
IC7, 8: RP130K331D-TR
E
S O U T H E U R O P E
V
T A I W A N
CMOS-based positive voltage regulator
F
R U S S I A N
P
L A T I N A M E R I C A
S
B R A Z I L
H
T H A I
V
V
DD
4
1
IC5: R3116N271A-TR-F
Vref
Voltage detector ICs
Current Limit
CE
3
2
GND
V
DD
2
Pin No.
Symbol
Description
Delay
1
OUT
Circuit
1
V
OUT
Output Pin
2
GND
Ground Pin
3
CE
Chip Enable
Vref
4
V
Input Pin
3
GND
DD
5
C
D
X
Y
Z
WXA-50/WXC-50
IC1: TMPM462F15FG (ADBB)
CMOS 32-bit Microprocessor
Cortex-M4F
NVIC
FLASH
Backup
BOOT
1.5MB
RAM
μDMA
Debug
RAM
ROM
or
192KB
(unit A,B,C)
4KB
1.0MB
1KB
A C D C
AHB Lite (max 120MHz)
AHB to IO
AHB to APB
Bridge
Bridge
WDT
SIO/UART
EBIF
(6ch)
TMRB
ADC
CEC
(16ch)
(20ch)
MPT
SSP
RMC
(2ch)
(3ch)
PORT
UART
RTC
(2ch)
IHOSC
I2C
OFD
LVD
(5ch)
IHOSC
X1
EHOSC
CG
X2
XT1
ELOSC
XT2
IC2: M95320-RMN6TP
32 K-bit serial SPI bus EEPROM with high speed clock
7
3
1
6
5
2
T H M _ M O N
1 0
R E M _ I N 2
9
+ 3 . 3 M
8
D G N D
7
S W _ W L _ A L L
6
S W _ W L _ B T
5
Page 49
F2
+ 1 5 V
4
3
to MAIN (2)_CB603
IC3: SN74LVC1G17DCKR
D C _ T R G _ I N
2
Single schmitt-trigger buffer
A C _ P W R
1
W 2
NC
1
5
V CC
A
2
GND
3
4
Y
INPUT
OUTPUT
A
Y
V s a u x
3
Page 49
K16
H
H
G N D
2
L
L
to Amplifier and power module_P103
V d a u x
1
W 1
S A N - P H
IC4: 74LVC2G17GW
Dual non-inverting schmitt trigger with 5 V tolerant input
C B 2
P H I
F A N _ C T R L
1
1A
1
6
1Y
F A N _ L O C K
2
A M P _ O L V
Page 49
S13
3
GND
2
5
VCC
1A
1Y
+ 1 5 V
4
to MAIN (5)_W902
S P R Y _ C T R L
5
2A
3
4
2Y
2A
2Y
D G N D
6
|
|
|
IC6: BD9D321EF J-E2
4.5V to 18V Input, 3.0A Integrated MOSFET
1ch synchronous buck DC/DC converter
VREG
3
3
VIN
VREG
VIN
VIN
8
Thermal
VOUT
TSD
Protection
5V REG
VREG
BOOT
7
BG
BG
EN
EN
VOUT
UVLO
On Time
R
Q
Soft
ZERO
6
8
SS
TSD
Controller
Driver
Start
4
OCP
Circuit
SW
Block
S
SW
FB
5
2
REF
GND
SS
UVLO
OCP
TSD
EN
1
EN Logic
UVLO
OUT
★ All voltages are measured with a 10MΩ/V DC electronic voltmeter.
★ Components having special characteristics are marked ⚠ and must be replaced
with parts having specifications equal to those originally installed.
★ Schematic diagram is subject to change without notice.
● 電圧は、内部抵抗 10MΩの電圧計で測定したものです。
● ⚠印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、
パーツリストに記載されている部品を使用してください。
● 本回路図は標準回路図です。改良のため予告なく変更することがあります。
47
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