FIGURE 5.6 : TDA10046 BOARD CONFIGURATION
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Configuration
Table 5.4 Descriptions of the TDA10046 board configuration window
Output Configuration
Output Mode
Tuner Configuration
IF frequency
Misc configuration
BER counter depth
PLL
PLL factors (M, N, P)
Crystal frequency
FIGURE 5.7 : TDA10046 Registers
Specifies output mode (Parallel mode A, Parallel mode B, Serial)
Enter IF center frequency delivered by the tuner (36.125Mhz or 43.75Mhz)
Defines over many symbols the BER is measured.
Set the different divider ratios of the PLL / M = sampling clk of 52Mhz
Specifies the Xtal frequency connected to the TDA10046
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BU RF Solutions
Sampling
Clock control