Mitsubishi Electric MELSEC iQ-R Series User Manual page 30

Device name (device)
Link direct device Link input (Jn\X)
Link output (Jn\Y)
Link relay (Jn\B)
Link special relay (Jn\SB)
Link register (Jn\W)
Link special register
(Jn\SW)
Module access Module access device/
device Intelligent function module
device (Un\G)
Multiple CPU shared
device (U3En\G)
CPU buffer CPU buffer memory
memory access access device (U3En\G)
device
CPU buffer memory
access device (fixed cycle
communication area)
(U3En\HG)
Refresh data register (RD)
*1 Safety devices cannot be accessed.
*2 Q12DCCPU-V (Basic mode) has no device.
*3 A device name for QCPUs (Q mode) and LCPUs
*4 RnENCPUs and safety CPUs have no device.
2 SPECIFICATIONS
28
2.2 Access Specifications for a CPU Module
Access target device type (series)
RCPU
Programmable C Controller
controller CPU/ module
Process CPU/
*1
Safety CPU
 
 
 
 
 
 
 
 
 
*4
 
 
QCPU (Q mode)
Programmable C Controller
controller CPU/ module
Process CPU
 
 
 
 
 
 
 
 
 
 
 
LCPU
Programmable
controller CPU










