Table Of Contents - Philips PDIUSBD12 Firmware Programming Manual

Interconnectivity
Firmware Programming Guide for PDIUSBD12

Table of Contents

1 INTRODUCTION........................................................................................................................................... 4
2 ARCHITECTURE .......................................................................................................................................... 5
2.1 F S
IRMWARE TRUCTURE
2.1.1 Hardware Abstraction Layer - EPPHAL.C ........................................................................................... 5
2.1.2 PDIUSBD12 Command Interface - D12CI.C ........................................................................................ 5
2.1.3 Interrupt Service Routine - ISR.C ......................................................................................................... 5
2.1.4 Main Loop - MAINLOOP.C ................................................................................................................. 6
2.1.5 Protocol Layer - CHAP_9.C, PROTODMA.C....................................................................................... 6
2.2 P F
ORTING THE IRMWARE TO
2.3 U F
SING THE IRMWARE IN
3 HARDWARE ABSTRACTION LAYER ....................................................................................................... 7
4 PDIUSBD12 COMMAND INTERFACE........................................................................................................ 7
5 INTERRUPT SERVICE ROUTINE .............................................................................................................. 8
5.1 B R S
US ESET AND USPEND
5.2 C E
ONTROL NDPOINT
5.3 G E H
ENERIC NDPOINT
5.4 M E H
AIN NDPOINT ANDLER
5.5 EOT H ......................................................................................................................................... 13
ANDLER
6 MAIN LOOP ................................................................................................................................................. 14
7 CHAPTER 9 PROTOCOL ........................................................................................................................... 15
7.1 C F R
LEAR EATURE EQUEST
7.2 G S R
ET TATUS EQUEST
7.3 S A R
ET DDRESS EQUEST
7.4 G C R
ET ONFIG EQUEST
7.5 G D R
ET ESCRIPTOR EQUEST
7.6 S C R
ET ONFIG EQUEST
7.7 G /S I R
ET ET NTERFACE
7.8 S F R
ET EATURE EQUEST
8 DMA SUPPORT............................................................................................................................................ 20
8.1 I P
NTRODUCTION TO ROTOCOL
8.2 D ' DMA S
EVICE S TATES
8.3 DMA C
ONFIGURATION
8.4 S DMA R
ETUP EQUEST
8.5 H S P
OST IDE ROGRAMMING
_______________________________________________________________________________________________
............................................................................................................................... 5
O CPU P
THER LATFORM
P M .................................................................................................... 6
OLLING ODE
C .............................................................................................................. 9
HANGE
H .................................................................................................................. 10
ANDLER
................................................................................................................... 13
ANDLER
........................................................................................................................ 13
........................................................................................................................ 15
............................................................................................................................... 16
............................................................................................................................. 16
............................................................................................................................... 17
....................................................................................................................... 17
............................................................................................................................... 18
................................................................................................................... 18
EQUEST
............................................................................................................................. 19
B DMA O
ASED PERATION
............................................................................................................................. 20
R .............................................................................................................. 21
EGISTER
.............................................................................................................................. 21
C ............................................................................................. 22
ONSIDERATIONS
Philips Semiconductors - Asia Product Innovation Centre
Visit http://www.flexiusb.com
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