■ DISPLAY DATA
● V2001 : 016ST106INK (MAIN (2) P.C.B.)
54
● PIN CONNECTION
Pin No.
1
9
1
8
Connection
NX
NX
(11G)
(11G)
(12G)
Pin No.
37
36
Connection
RESET
NX
(5G)
Pin No.
54
53
Connection
F+
F+
Note: 1) F+, F- ..... Filament
2) NP ..... No pin
5) PGND ..... Power GND pin
9) DA ..... Serial data input
13) RESET ..... Reset input
● GRID ASSIGNMENT
(B)
(B)
(B)
(B)
(A)
(A)
(A)
(A)
1G
2G
3G
4G
1 -1
2-1
3-1
4-1
5-1
1 -2
2-2
3-2
4-2
5-2
1 -3
2-3
3-3
4-3
5-3
1 -4
2-4
3-4
4-4
5-4
1 -5
2-5
3-5
4-5
5-5
1 -6
2-6
3-6
4-6
5-6
1 -7
2-7
3-7
4-7
5-7
1G – 16G
1
7
1
6
1
5
1
4
1
3
1
2
NX
N
X
N
X
NX
N
X
N
X
(12G)
(13G)
(13G)
35
34
33
32
31
NX
CS
NX
NX
NX
(5G)
(6G)
(6G)
(7G)
52
51
50
49
48
NP
NP
LGND
PGND
VH
3) DL ..... Datum line
6) VH ..... High voltage supply pin
10) TSA, B ..... Test pin
11) CS ..... Chip select input pin
14) NX ..... No extended pin
(B)
(B)
(B)
(B)
(A)
(A)
(A)
(A)
5G
6G
7G
8G
9
8
7
11
10
NX
NX
N
X
N
X
NX
(14G)
(14G)
(15G)
(15G)
(16G)
30
29
28
27
26
25
CP
NX
NX
NX
DA
NX
(7G)
(8G)
(8G)
(9G)
47
46
45
44
43
42
NX
NX
VDD
NX
NX
NX
(1G)
(1G)
(2G)
(2G)
(3G)
4) LGND ..... Logic GND pin
7) VDD ..... Logic voltage supply pin
12) OSC ..... Pin for self-oscillation
(A)
(A)
(A)
(A)
9G
10G
1 1G
12G
R-N402/R-N402D
1
6
5
4
3
2
1
NX
NX
N
P
N
P
F
–
F–
(16G)
24
23
22
21
20
NX
TSA
NX
TSB
NX
(9G)
(10G)
(10G)
41
40
39
38
NX
OSC
NX
NX
(3G)
(4G)
(4G)
8) CP ..... Shift register clock
(A)
(A)
(A)
(A)
13G
14G
15G
16G
39