Rf Block Diagram - Nokia RM-761 Service Manual

Table of Contents

Advertisement

Name
VDDTDC
VDDMS
VDDXO
VDDMMD

RF block diagram

TX path overview
The TX digital architecture in the X-GOLD213 IC is based on a fractional-N sigma-delta synthesizer to generate
the two outputs at the TX1 port and TX2 port; LB and HB respectively. At The TX outputs, the AC coupled
Capacitors are removing the DC from the X-GOLD213 IC, the RF signal is then harmonic filtered by a H4 filter
(4th Harmonic Notch Filter) for LB and a H2 filter (2nd Harmonic Notch filter) for HB (both filter are series
resonance filter to GND), and attenuated by a 2dB attenuator before the FEM (PA+ antenna switch). The input
signal to the FEM is a GMSK RF modulated carrier signal in the range of -3dBm to +3dBm. The PA amplifies
the signal to its wanted output power level (PCL of the GSM specification) determined by the amplitude level
of the Vramp signal. The RF output signal from the FEM is delivered to the RF connector (RF production/debug
connector) if a RF cable is present or to the Antenna Pad in case of no RF cable connected. A detailed description
of the TX path in the RF part of the Quantum engine can be found in Appendix B.
RX path overview
The RX signal is input from the Antenna or from the RF connector if the RF cable is attached to the production
RF connector. The RF signal is then input to the antenna switch of the FEM, where it is switched to either the
LB path or the HB path. This is controlled by the settings of FE1/VC1 (TX-RX Switch), PABS/VC2 (Band Select),
and FE2/VC3 (Antenna Switch configuration); see the FEM logic table in Table 7. The antenna input signal is
then band-pass filtered in the SAW filter module with the RX in-band frequencies as specified in Table 1. After
BP filtering the RF signal is matched to the impedance of the X-GOLD213 IC differential inputs for optimum
Page 5 – 26
Ball No.
B12
C7131
H13
C7123
E11
C7130
A12
NONE
Figure 70 RF block diagram
COMPANY CONFIDENTIAL
Copyright © 2011 Nokia. All rights reserved.
Test point
1.3V VDD for Time to Digital Converter of
DPLL
1.3V Mixed signal supply
1.3V DCXO supply
1.3V VDD for Multi Modulus Divider of DPLL
RM-761; RM-799; RM-800
System Module
Function
Issue 1

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

Rm-799Rm-80020020002010201

Table of Contents