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VCT 49xxI
Volume 1: General Description
Pin Configuration
GND
45
VSUP1.8FE
46
VOUT3
47
VOUT2
48
VOUT1
49
VIN1
50
VIN2
51
VIN3
52
VIN4
53
VIN5
54
VIN6
55
VIN7
56
VIN8
57
VIN9
58
VIN10
59
VIN11
60
P23
61
P22
62
XTAL2
63
XTAL1
64
VSUP1.8DIG
65
GND
66
GND
67
VSUP3.3DIG
68
VSUP5.0IF
69
GNDIF
70
RESETQ
71
IFIN+
72
IFIN-
73
VREFIF
74
TAGC
75
SIF / AIN1R
76
AIN1L
77
AIN2R
78
AIN2L
79
AIN3R / AOUT2R
80
AIN3L / AOUT2L
81
AOUT1R
82
AOUT1L
83
SPEAKERR
84
SPEAKERL
85
VREFAU
86
VSUP8.0AU
87
GND
88
Fig. 4–3: PSSDIP88-1 package
1-22
44
GND
VSUP3.3FE
43
P10
42
P11
41
40
P12
39
P13
P14
38
P15
37
P16
36
35
P17
34
P20 / DFVBL
33
P21 / PWMV
SCL
32
SDA
31
VPROT
30
29
HOUT
28
HFLB
SAFETY
27
GNDDAC
26
VSUP3.3DAC
25
24
VSUP3.3IO
23
GND
GND
22
VSUP3.3BE
21
XREF
20
VRD
19
18
BOUT
17
GOUT
ROUT
16
15
SVMOUT
BIN
14
GIN
13
12
RIN
11
FBIN
GNDM
10
SENSE
9
RSW1
8
7
RSW2
6
EW
5
VERT-
VERT+
4
TEST
3
VSUP5.0BE
2
1
GND
Fig. 4–4: PSSDIP88-2 package (pinning mirrored)
Dec. 6, 2002; 6251-573-1-1AI
ADVANCE INFORMATION
GND
45
VSUP3.3FE
46
P10
47
P11
48
49
P12
P13
50
P14
51
52
P15
53
P16
P17
54
P20 / DFVBL
55
P21 / PWMV
56
57
SCL
58
SDA
VPROT
59
HOUT
60
HFLB
61
62
SAFETY
63
GNDDAC
VSUP3.3DAC
64
VSUP3.3IO
65
66
GND
GND
67
VSUP3.3BE
68
XREF
69
VRD
70
71
BOUT
72
GOUT
ROUT
73
SVMOUT
74
75
BIN
76
GIN
RIN
77
FBIN
78
GNDM
79
80
SENSE
RSW1
81
RSW2
82
EW
83
84
VERT-
85
VERT+
TEST
86
VSUP5.0BE
87
GND
88
44
GND
43
VSUP1.8FE
42
VOUT3
41
VOUT2
40
VOUT1
39
VIN1
38
VIN2
37
VIN3
36
VIN4
35
VIN5
34
VIN6
33
VIN7
32
VIN8
31
VIN9
30
VIN10
29
VIN11
28
P23
27
P22
26
XTAL2
25
XTAL1
24
VSUP1.8DIG
23
GND
22
GND
21
VSUP3.3DIG
20
VSUP5.0IF
19
GNDIF
18
RESETQ
17
IFIN+
16
IFIN-
15
VREFIF
14
TAGC
13
SIF / AIN1R
12
AIN1L
11
AIN2R
10
AIN2L
9
AIN3R / AOUT2R
8
AIN3L / AOUT2L
7
AOUT1R
6
AOUT1L
5
SPEAKERR
4
SPEAKERL
3
VREFAU
2
VSUP8.0AU
1
GND
Micronas
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