Philips AZ7381 Service Manual page 13

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SAA7374 – DECODER AND DIGITAL SERVO IC CD7 (low voltage version)
Pin
Name
Direction
–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
1
VSSA1
GND
2
VDDA1
+3
HF-preamp → CD7
3
D1
HF-preamp → CD7
4
D2
HF-preamp → CD7
5
D3
6
VRL
GND
HF-preamp → CD7
7
D4
HF-preamp → CD7
8
R1
HF-preamp → CD7
9
R2
→ CD7
10
IREFT
CD7 →
11
VRH
12
VSSA2
GND
13
SELPLL
+3
CD7 →
14
ISLICE
→ CD7
15
HFIN
16
VSSA3
GND
→ CD7
17
HFREF
→ CD7
18
IREF
19
VDDA2
+3
20
TEST1
GND
µP → CD7
21
CRIN
CD7 →
22
CDOUT
23
TEST2
GND
CD7 →
24
CL16
CD7 →
25
CL11
CD7 → servo driver
26
RA
CD7 → servo driver
27
FO
CD7 → servo driver
28
SL
29
TEST3
GND
30
VDD1P
+3
CD7 →
31
DOBM
32
VSS1
GND
CD7 →
33
MOTO1
CD7 →
34
MOTO2
CD7 → NPC
35
SBSY
CD7 → µP
36
SFSY
→ CD7
37
RCK
CD7 →
38
SUB
39
VSS2
GND
CD7 →
40
V5
CD7 → HF-preamp
41
V4
CD7 → NPC
42
V3
CD7 →
43
KILL
CD7 → NPC
44
MISC
CD7 → NPC
45
DATA
CD7 → NPC
46
WCLK
47
VDD2P
+3
CD7 → NPC
48
SCLK
49
VSS3
GND
CD7 →
50
CL4
µP ↔ CD7
51
SDA
µP → CD7
52
SCL
µP → CD7
53
RAB
µP → CD7
54
SILD
55
NC
56
VSS4
GND
µP → CD7
57
RESET
CD7 → µP
58
STATUS
59
VDD3C
+3
CD7 →
60
C2FAIL
CD7 →
61
CFLG
→ CD7
62
V1
→ CD7
63
V2
CD7 → HF-preamp
64
LDON
3-6
Description
supply (analog) of CD7
supply (analog) of CD7
unipolar current input (central diode signal input)
unipolar current input (central diode signal input)
unipolar current input (central diode signal input)
reference input for ADC
unipolar current input (central diode signal input)
unipolar current input (satellite diode signal input)
unipolar current input (satellite diode signal input)
current reference for calibration ADC
reference output from ADC
supply (analog) of CD7
selects whether internal clock multiplier PLL is used
current feedback from data slicer
comparator signal input
supply (analog) of CD7
comparator common mode input
reference current pin (nom. VDD/2)
supply (analog) of CD7
test control input
crystal/resonator input
crystal/resonator output
test control input
16.9344MHz system clock output
11.2896MHz or 5.6448MHz clock output (3-state)
radial actuator output
focus actuator output
slide actuator output
test control input
supply (digital) of CD7
bi-phase mark output (3-state)
supply (digital) of CD7
motor output1 of CD7; versatile (3-state)
motor output2 of CD7; versatile (3-state)
subcode block sync (3-state)
subcode frame sync (3-state)
subcode clock input
P to W subcode bits (3-state)
supply (digital) of CD7
versatile output pin of CD7
versatile output pin of CD7
versatile output pin of CD7 (open drain)
kill output; programmable (open drain)
C2 error flag; output only defined in CD-ROM modes (3-state)
serial data output (3-state)
word clock output (3-state)
supply (digital) of CD7
serial bit clock output (3-state)
supply (digital) of CD7
4.2336MHz µP clock output
µP interface data I/O line (open drain output)
µP interface clock line
µP interface R/W and load control line
µP interface R/W and load control line
no connection
supply (digital) of CD7
power-on reset input (active low)
servo interrupt request line/CD7 status register output (open drain)
supply core (digital)
indication of correction failure (open drain)
correction flag output (open drain)
versatile input pin
versatile input pin
laser drive on output (open drain)
CS 46 522

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