Details And Waveforms On System Test And Debugging; System 27Mhz Clock, Reset, Flash Sck Signal - LG DP471B Service Manual

DETAILS AND WAVEFORMS ON SYSTEM TEST AND DEBUGGING

1. SYSTEM 27MHz CLOCK, RESET, FLASH SCK SIGNAL.

1-1. Main clock is at 27MHz(Y2)
1
1-2. Reset is active high.
2
3
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Only for training and service purposes
FIG 1-1
FIG 1-2
R60
0/J/0402
R58
4.7K/F/0402
C71
33P/50V/0402
Close IC
3
RESET_B
U16
LD1117AL-1.8V/SOT-223
3 2
VIN VO
4
VO2
10U/6.3V/0805
3-9
CLKOUT
R65
0/J/0402 CLKIN
Y2
27M/49US/DIP C81
33P/50V/0402
+3.3V_SYS
C106
NC
U10
G692L263TCUF
1 4
GND VCC
2 3
RST MR
2
L4
0/J/0603
C23 C17 C22
NC/10U/6.3V/0805 0.1U/25V/0402
LGE Internal Use Only
1
+1.8V_SYS