Table of Contents
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Pin
Port
No.
1
CVSS1 GND
2
-
3
CVSS2 GND
4
DVDD1 I/O system (3.3V) power
supply
5
A10
Address bus of FLASH ROM
6
-
7
A11
Address bus of FLASH ROM
8
A12
9
A13
10 A14
11 A15
12 /
CORE CPU system (1.6V)
CVDD1
power supply
13
-
14 DVSS1 GND
15 CVSS3 GND
16 /
I/O system (3.3V) power
CVDD2
supply
17
-
18
-
19 READY
20 /PS
FLASH ROM selection
signal
21
-
22
-
23 R/W
Lead/light signal to FLASH
ROM
24 /
Memory access signal
MSTRB
25
-
26 /MSC
27 MUTE
Mute signal output (H:Mute
on)
28
-
29
-
30 /HOLD
31 BIO
SUBO input
32 MP/MC Operation mode setting
(external pull-up)
33 DVDD2 I/O system (3.3V) power
supply
34 CVSS4 GND
35 BD R1 GND
36
-
37 CVSS5 GND
38
-
Descriptions
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I/O
(V)
-
0
-
-
-
0
-
3.3
O
0
-
-
O
3.3
O
3.3
O
3.3
O
3.3
O
3.3
-
1.6
-
-
-
0
-
0
-
1.6
-
-
-
-
-
3.3
O
3.3
-
-
-
-
O
3.3
O
3.3
-
-
-
3.3
O
0
-
-
-
-
-
3.3
I
0
I
3.3
-
3.3
-
0
I
0
-
-
-
0
-
-
9
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