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AND Gates
OR Gates
bbAn-t
bbOn-t
R
12K
R
130K
R
t
t
0
3.9K
0
1
4.7K
1
2
5.6K
2
4
6
300K
7
330K
Distributed OR gate.
bbOn-t
R
AND gate with controlled pull-up.
OR gate with controlled pull-down.
Used in marker decoders.
Used in marker decoders.
R
bbAn-t
bbOn-t
R
R
R
Canon 161 Calculator
Section: Modules - Gates & Display
Page: 4
Rendition: 2022 Feb 6
Inverters
bbVn-t
RL
3K
C
1.5n
T
B329
12K
RB
51K
R
t
V a r i a t i o n s
4.7K
0
C=none
5.6K
1
8.2K
2
C=none RL=1.8K
33K
3
RL=1.8K
4
C=none RL=820
5
RL=820
6
C=none T=A538
7
C=1nF T=A538
8
C=none RL=1.8K T=A538
9
C=1nF RB=68K T=A538
N o t e s
• Gates are identified with a label of the form:
bbgn-t
where:
bb = board [30-40]
g = gate type (And,Or,inVerter,Buffer)
n = enumeration
t = type variation (see tables above)
• Logic 0 = 0V, GND, E
Logic 1 = –10V
Buffers
bbBn-0t
n8
R
2K
D77
1
n1
0 t
V a r i a t i o n s
01
R=1K
2
n2
bbBn-1t
4
n4
T
B329
8
R
5.6K
n8
1 t
V a r i a t i o n s
10
11
T=A538
12
T=B222
13
R=3K
14
R=3K T=B222
15
R=2K T=B222
16
R=2K B=221
17
R=5.6K to E
bbBn-D
B221
D77
Display
8
n4 4
n2 2
Display
–V(L)
d -0
N bbcp
B77
1
n1
22
n2
bbAdd0
n4
-2
n1
d -1
n8
N bbcp
B77
1
n2
bbAdd1
2
n4
-2
n8
d -2
N bbcp
n2
B77
n1
2
bbAdd2
-2
n4
d -3
4
N bbcp
B77
1
2
bbAdd3
n4
-2
n4
d -4
N bbcp
B77
n1
8
n2
bbAdd4
-2
4
d -5
n8
N bbcp
B77
1
n2
bbAdd5
-2
4
d -6
N bbcp
B77
n1
2
bbAdd6
-2
4
d -7
N bbcp
B77
1
2
bbAdd7
-2
4
d -8
N bbcp
B77
n1
bbAdd8
8
-2
d -9
N bbcp
B77
1
d = digit (16 to 1)
bbAdd9
bb = board (30,31,32,33,34)
8
-2
c = connector (3,4)
p = pin (A to Z)
–2V
n1 1
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