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The information in this document is subject to change without notice. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document.
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Some information contained in this document may vary from country to country. Before using any NEC product in your application, pIease contact the NEC office in your country to obtain a list of authorized representatives and distributors. They will verify: Device availability •...
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READERS This manual is intended for users who design and develop application systems using the V850/SA1. PURPOSE The purpose of this manual is to describe the proper operation of the IE-703017-MC-EM1 and its basic specifications. ORGANIZATION This manual is broadly divided into the following parts.
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µ PD703017Y Data Sheet To be prepared { Documents related to development tools (User’s Manual) Product Document Number IE-703002-MC (In-circuit emulator) U11595E IE-703017-MC-EM1 (In-circuit emulator option board) This manual CA850 (C Compiler package) Operation UNIX based U12839E Operation Windows based...
System Configuration ..........................13 Contents in Carton ............................14 Connection between IE-703002-MC and IE-703017-MC-EM1..............16 CHAPTER 2 NAME AND FUNCTION OF COMPONENTS..............19 Component Name and Function of IE-703017-MC-EM1................19 Clock Settings .............................. 21 2.2.1 Main clock settings ........................... 21 2.2.2 Subclock settings ..........................
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List of Figures Figure No. Title Page System Configuration ............................13 Contents in Carton ............................14 Accessories ...............................15 Connection between IE-703002-MC and IE-703017-MC-EM1................17 IE-703017-MC-EM1............................19 Schematic Diagram of Power Supply Acquisition....................27 NMI Signal Flow Path ............................28 Signal Flow Path ............................28...
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List of Tables Table No. Title Page Main Clock Setting ............................21 Subclock Setting ............................... 22 JP1 setting in IE-703002-MC ..........................23 JP3 and JP4 Setting in IE-703002-MC......................23 MAM Register and J1 Setting Correspondence ....................24 Bus Interface Pin Operation List........................29...
CHAPTER 1 OVERVIEW The IE-703017-MC-EM1 is an optional board for the IE-703002-MC in-circuit emulator. By connecting the IE- 703017-MC-EM1 and IE-703002-MC, hardware and software can be debugged efficiently in system development using the V850/SA1. In this manual, the basic setup sequences and switch settings of the IE-703002-MC when using IE-703017-MC- EM1 are described.
{ Two methods of connection to target system: • Pod tip direct connection (For information on the pod, refer to the IE-703002-MC User’s Manual) • Attach an extension probe (optional) to the pod tip for connection. { Dimensions of the IE-703017-MC-EM1 are as follows. Parameter Value Note Power dissipation (Max.
CHAPTER 1 OVERVIEW 1.4 System Configuration The system configuration when connecting the IE-703002-MC to IE-703017-MC-EM1 and a personal computer (PC-9800 series or PC/AT (or compatibles)) is shown below. Figure 1-1. System Configuration <13> <5> <6> <7> [Magnified drawing: example of use of connector for target connection] <12>...
CHAPTER 1 OVERVIEW 1.5 Contents in Carton The carton of the IE-703017-MC-EM1 contains a main unit, guarantee card, packing list, and accessory bag. Make sure that the accessory bag contains this manual and the connector accessories. In case of missing or damaged contents, please contact an NEC sales representative or NEC dealer.
CHAPTER 1 OVERVIEW Check that the accessory bag contains this manual, an accessory list, and the following accessories. (a) Connector for target connection (NQPACK100SD) × 1 set (including NQGUIDE 3 pcs., screw driver × 1 pc.) (b) Crystal oscillator (17 MHz, 8-pin type): 1 pc. (c) Plastic screws ×...
<3> Set the PGA socket lever of the IE-703017-MC-EM1 to the OPEN position as shown in Figure 1-4 (b). <4> Connect the IE-703017-MC-EM1 to the PGA socket at the back of the pod (refer to Figure 1-4 (c)). When connecting, position the IE-703002-MC and IE-703017-MC-EM1 so that they are horizontal.
This chapter describes the names, functions, and switch settings of components comprising the IE-703017-MC- EM1. For the details of the pod, jumpers, and switch positions, etc., refer to IE-703002-MC User’s Manual. Component Name and Function of IE-703017-MC-EM1 Figure 2-1. IE-703017-MC-EM1...
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CHAPTER 2 NAME AND FUNCTION OF COMPONENTS (1) Test pin (TP4-TP7) These pins are used for testing analog signals for the emulator as a standalone unit. • TP4: AV • TP5: AV • TP6: AV • TP7: P70 (Analog port) (2) JP1 This is the switch jumper of the main clock supply source.
NAME AND FUNCTION OF COMPONENTS Clock Settings This section describes the clock settings. For JP1 and JP2 in IE-703017-MC-EM1, refer to Figure 2-1. For the jumper switch position in the IE-703002-MC, refer to IE-703002-MC User’s Manual. 2.2.1 Main clock settings Table 2-1.
NAME AND FUNCTION OF COMPONENTS 2.2.2 Subclock settings Table 2-2. Subclock Setting Emulator use environment Clock supply method IE-703017-MC-EM1 setting Note 1 When using emulator as Internal clock Oscillator is included (32.768 kHz oscillation circuit is included at Note 3...
CHAPTER 2 NAME AND FUNCTION OF COMPONENTS 2.3 Illegal Access Detection ROM Setting If using the IE-703002-MC for an in-circuit emulator for V850/SA1 by connecting IE-703017-MC-EM1, set JP1 of the IE-703002-MC as follows. Table 2-3. JP1 setting in IE-703002-MC Description...
NAME AND FUNCTION OF COMPONENTS 2.5 Separate Bus Function Setting To use the separate bus function, J1 of IE-703017-MC-EM1 must be set. Table 2-5 shows the correspondence between the MAM register and J1 settings. Table 2-5. MAM Register and J1 Setting Correspondence...
CHAPTER 3 FACTORY SETTINGS Description Remark Internal main clock setting Oscillation circuit is set 32.768-kHz clock is supplied for subclock. Set to port mode (P34-P36, P100-P107, P110- P113)
(3) When the voltage of the target system is lower than 1 V, the emulator recognizes the target system power is off and operates at 3.3 V. Figure 4-1. Schematic Diagram of Power Supply Acquisition Target system IE-703017-MC-EM1 IE-703002-MC Target voltage emulation...
In addition, the DC characteristics change. The input voltage becomes V = 2.0 V (MIN.) and V = 0.8 V (MAX.). = ±1.0 µ A (MAX.). The input current becomes I Figure 4-2. NMI Signal Flow Path IE-703017-MC-EM1 Target system NMI signal NMI pin FPGA I/O chip 4.3 V...
CHAPTER 4 CAUTIONS 4.5 NMI Signal Mask Function When using the P00/NMI pin in the port mode, do not mask the NMI signal. 4.6 Bus Interface Pin The operation of the pin for the bus interface differs between the emulator and the target device as follows. Table 4-1.
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CHAPTER 4 CAUTIONS Table 4-1. Bus Interface Pin Operation List (2/2) (b) During Run Pin name Internal memory External memory Internal ROM Internal RAM Internal Emulation RAM Target System Peripheral I/O A16-A21 Hold the accessed last Active Active AD0- Hi-Z Active Active AD15...
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