Siemens SINUMERIK 840D sl Equipment Manual page 30

Connecting
5.1 Pin assignment of the interfaces
Table 5-3
Connector
1
19
30
Allocation of the LVDS display interface
Pin Name
1/2 P5V_D_fused
3 RXIN0-
4 RXIN0+
5/6 P3V3_D_fused
7 RXIN1-
2
8 RXIN1+
9/10 GND
11 RXIN2-
12 RXIN2+
20
13/14 GND
15 RXCLKIN-
16 RXCLKIN+
17/18 GND
19/20 N.C.
Type Meaning
VI +5 V display supply voltage (fused in PCU/
TCU)
I LVDS input signal
VI +3.3 V display supply voltage (fused in PCU/
TCU)
I LVDS input signal
VI System ground (reference potential)
I LVDS input signal
VI System ground (reference potential)
I LVDS cycle clock signal
VI System ground (reference potential)
Not assigned
Equipment Manual, 12/2022, A5E50751046B AA
Bit 0 (-)
Bit 0 (+)
Bit 1 (-)
Bit 1 (+)
Bit 2 (-)
Bit 2 (+)
(-)
(+)
Operator panel front: OP 010S