LG SH33SU-S/W Service Manual page 51

5. IC704 PWM
• PIN DESCRIPTION
Name
PLL_AVDD
PLL_AVSS
PLL_DVDD
PLL_DVSS
DVDD
DVSS
IO_VDD
10, 22, 29, 39, 47,
IO_VSS
/RESET
XIN
XOUT
MBCK
MLRCK
MSDIN [3:0]
SBCK
SLRCK
SSDIN [3:0]
LGE Internal Use Only
Pin NO. Type
Power and Ground
6 Analog
Power
8 Analog
Ground
3 PLL
Power
2 PLL
Ground
13, 34, 42, Power
66, 80, 91
14, 35, 43, Ground
63, 81, 92
4, Power
56, 65, 72, 94
1, 5, 7, 9, 21, Ground
28, 38, 44, 50,
53, 57, 60, 64,
69, 73, 85, 95
Reset and Clock
96 I
86 Analog
87 Analog
PCM Audio Input/Output Interface
11 I/O
12 I/O
15, 16, 17, 18 I
19 I/O
20 I/O
23, 24, 25, 26 I/O
Description
PLL analog power supply.
PLL analog ground.
PLL digital power supply.
PLL digital ground.
Core power supply.
Core digital ground.
I/O power supply. 3.3V Digital power supply.
I/O digital ground.
H/W reset signal. Active Low Schmitt-Trigger input.
The Schmitt-Trigger input allows a slowly rising input to reset the
chip reliably. The RESET signal must be asserted 'Low' during
power up. De-assert 'High' for normal operation.
Crystal Oscillator input pin.
Crystal Oscillator output pin.
PCM bit clock input/output of main 8-channel audio.
User can select the master/slave mode of this signal.
Schmitt-Trigger input.
PCM Word clock (left-right clock) input/output of main 8-channel
audio. User can select the master/slave mode of this signal.
Schmitt-Trigger input.
PCM serial data input of main 8-channel audio.
Schmitt-Trigger input.
PCM bit clock input/output of 8-channel audio.
User can select the master/slave mode of this signal.
Schmitt-Trigger input.
PCM word clock (left-right clock) input/output of sub 8-channel
audio. User can select the master/slave mode of this signal.
Schmitt-Trigger input.
PCM serial data input of sub-channel audio.
User can set this sub-channel data input pins to PCM serial data
output pins. See the Control Register Description part.
Schmitt-Trigger input
2-42 Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes