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Motorola M68MPFB1632 User Manual

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M68MPFB1632/D
June 1994
M68MPFB1632
MODULAR PLATFORM BOARD
USER'S MANUAL
© MOTOROLA, INC., 1993, 1994; All Rights Reserved

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Summary of Contents for Motorola M68MPFB1632

  • Page 1 M68MPFB1632/D June 1994 M68MPFB1632 MODULAR PLATFORM BOARD USER’S MANUAL © MOTOROLA, INC., 1993, 1994; All Rights Reserved...
  • Page 2 Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur.

  • Page 3: Table Of Contents

    3.2.1.4 Data RAM Write Enable Select Header (W11)..........3-8 3.2.1.5 A19 Disconnect Select Header (W19).............. 3-9 3.2.2 Pseudo ROM Configuration (U2 and U4)..............3-10 3.2.2.1 Pseudo ROM Pin 1 Select Header (W2)............3-13 3.2.2.2 Pseudo ROM Package Size Select Header (W3)..........3-13 M68MPFB1632/D...
  • Page 4 6.3 Using an MCU with SCIM ....................6-1 6.4 Jumper Header Configuration..................... 6-2 6.4.1 PRU OEALL Select Header (W5) ................6-2 6.4.2 PRU Reset Data Control Header (W6)................ 6-3 CHAPTER 7 SUPPORT INFORMATION 7.1 Introduction......................... 7-1 7.2 Connector Signal Descriptions ................... 7-1 M68MPFB1632/D...
  • Page 5 7-9 Logic Analyzer Connector J13 Pin Assignments ............... 7-7 7-10 Logic Analyzer Connector J14 Pin Assignments ............... 7-8 7-11 Logic Analyzer Connector J15 Pin Assignments ............... 7-9 7-12 Logic Analyzer Connector J16 Pin Assignments ............... 7-9 7-13 Logic Analyzer Connector J17 Pin Assignments ............... 7-9 M68MPFB1632/D...
  • Page 6 7-15 Logic Analyzer Connector J19 Pin Assignments ............. 7-10 7-16 Logic Analyzer Connector J20 Pin Assignments ............. 7-10 7-17 RS-232 Evaluation Port Connector J21 Pin Assignments..........7-11 7-18 RS-232 Evaluation Port Connector J22 Pin Assignments..........7-11 7-19 Serial Data Wire-Wrap Connector J23 Pin Assignments ..........7-12 M68MPFB1632/D...

  • Page 7: Chapter 1 General Information

    1.1 INTRODUCTION This manual provides general information, hardware preparation, installation instructions, and support information for the M68MPFB1632 Modular Platform Board (MPFB). The MPFB is part of Motorola’s modular approach to microcontroller unit-based product development. This modular approach lets you easily configure our development systems to fit your requirements.

  • Page 8: Specifications

    0 to 90% (non-condensing) Power requirements +5Vdc (±10%) @ 1.0 A (max.) – fuse protected @ 1.5 Amps +12Vdc (±5%) @ 0.50 mA (max.) – current limiting circuit Dimensions Modular Platform Board 8.5 x 11 in. (216 x 279 mm) M68MPFB1632/D...

  • Page 9: General Description

    MEVB circuitry, you may use the on-board reset switch or the software RESET command. NOTE The MPFB must be configured for the specific MPB. For a detailed description of the MPB jumper header selections refer to the specific MPB user’s manual. M68MPFB1632/D...

  • Page 10: Equipment Required

    ICD16 or ICD32 development software, an MS-DOS compatible computer and interface cable are required. For ICD16 or ICD32 computer and interface cable requirements refer to the ICD16 In-Circuit Debugger User's Manual, M68ICD16/D or the ICD32 In-Circuit Debugger User's Manual, M68ICD32/D. M68MPFB1632/D...

  • Page 11: Chapter 2 Hardware Preparation And Installation

    MPFB jumper headers and a description of the function in each position. Refer to paragraphs 2.2.1 through 2.2.6 for a more complete definition of the jumper headers for general MPFB configuration. Refer to the specific chapter for details on other MPFB jumper headers. M68MPFB1632/D...
  • Page 12 HARDWARE PREPARATION AND INSTALLATION Figure 2-1. MPFB Jumper Header, Connector, and Switch Location Diagram M68MPFB1632/D...
  • Page 13 Jumper installed on pins 2 and 3; pseudo ROM port size is byte. 1 2 3 Jumper installed on pins 1 and 2 (factory default); disables the PRU. PRU OE(ALL) Jumper installed on pins 2 and 3; user enables/disables the PRU by Selection controlling OE(ALL) from logic analyzer connector J7. M68MPFB1632/D...
  • Page 14 No jumper; CS3 is not used as the write enable for the device in socket U1. You must connect an alternate signal to pin 2 of jumper header W11 or you can not write to the device in the data RAM socket U1. M68MPFB1632/D...
  • Page 15 Jumper installed; the MCU MODCLK signal is driven low (logic 0) during reset. No jumper installed (factory default); the BERR signal is pulled high (logic 1) via a resistor during reset. BERR Selection Jumper installed; the BERR signal is driven low (logic 0) during reset. M68MPFB1632/D...
  • Page 16 Jumper installed on pins 2 and 3; selects the emulation MCU (on the MPB) as an M68HC16 MCU device. Jumper header W23 configures RS-232 port 2 (J22) protocol as DTE or DCE. The factory configuration (shown) is the fabricated jumpers RS-232 Port 2 positioned for DCE protocol. Protocol M68MPFB1632/D...

  • Page 17: J10, J11 +5 Volt Select Header (W9)

    MCU. To apply backup power to VSTBY, remove the fabricated jumper and connect the external power source to pin 2 and external power ground to pin 1. VSTBY Fabricated Jumper M68MPFB1632/D...

  • Page 18: Modclk Select Header (W16)

    BERR CAUTION The MPFB must have all memory devices removed from their sockets and the PRU set to OFF (a jumper on W5 pins 1 and 2). This function is for final evaluation of an MCU with internal ROM/EEPROM. M68MPFB1632/D...

  • Page 19: J13 +5 Volt Select Header (W21)

    (PAL) chip which CPU type is installed. The PAL creates the latched DSO and DSI (LAT-DSO and LAT-DSI) signals on J12. The LAT-DSO and LAT-DSI signals are used by the logic analyzer to perform disassembly. If you are not using a logic analyzer, W22 setting is inconsequential. M68MPFB1632/D...

  • Page 20: Mpfb Led Descriptions

    J5 to release tension on the contacts, then insert the bare wire into J5 and close the lever. The MEVB requires a +5Vdc @ 1.0 amp power supply for operation. A 1.5 amp fuse is installed on the MPFB +5Vdc power supply input line. M68MPFB1632/D 2-10...
  • Page 21 Do not use wire larger than 20 AWG in connector J5. Such wire could damage the connector. Turn off MEVB power when installing or removing the MPB from the MPFB. Sudden power surges could damage MEVB integrated circuits. M68MPFB1632/D 2-11...

  • Page 22: Personal Computer - Bdm Connection (J6)

    Personal Computer – BDM Connection (J6) As the MEVB does not have on-board debug firmware, debugging does not consume MCU resources. Motorola ships the MEVB with the ICD16 or ICD32 debug monitor, which easily connects to the MPFB’s standard background-mode header (connector J6). For additional information about the ICD software, including debugging and assembly information, see either the ICD16 or ICD32 user’s manual.

  • Page 23: Reset Switch (S2)

    Be sure to put standoffs in the corner mounting holes to protect the wire wrapping on the bottom of the MPFB. BERG STRIP BERG STRIP HOLES HOLES SPARE SPARE CLKOUT BERR BKPT FREEZE LAT-DSO LAT-DSI DSACK0 DSACK1 FC2/CS5 FC0/CS3 SIZ1 SIZ0 BGACK/CS2/CSE M68MPFB1632/D 2-13...

  • Page 24: Starting Evaluation Activities

    Check that the DS1 LED is on (marked PWR). If LED does not illuminate then: — +5 volt power is not connected or supply is not on — Input power is reversed (+5Vdc on GND and GND on +5V). — Fuse is blown. M68MPFB1632/D 2-14...
  • Page 25 — Power at J5 is less than or equal to 4.5 volts and has tripped the low voltage detection IC. — Your circuit may be holding reset low. — Incorrect memory configuration on W10 or W12 (DS2 is ON). 5. MCU device is not seated properly in the socket on the MPB. M68MPFB1632/D 2-15...
  • Page 26 HARDWARE PREPARATION AND INSTALLATION M68MPFB1632/D 2-16...

  • Page 27: Introduction

    (16-bits at a time on the data bus) for the data RAM or pseudo ROM. The fast RAM sockets only provide a word memory port. The factory supplies 64K bytes of RAM in the pseudo ROM sockets. M68MPFB1632/D...
  • Page 28 It is usually easiest to envision the dual sockets as word port socket overlaid on a byte port socket. The confusion is greatly increased since the MPFB provides sockets for 300 mil and 600 mil memory devices. Each memory section below includes pictorial diagrams to help you with memory placements. M68MPFB1632/D...
  • Page 29 These paragraphs provide detailed information relating to each memory interface. U4A U4B DATA RAM PSEUDO ROM BYTE WORD BYTE WORD DATA RAM PSEUDO ROM 400 SOJ 400 SOJ SOCKET SOCKET FAST Figure 3-1. Memory Socket Diagram M68MPFB1632/D...

  • Page 30: Data Ram Configuration (U1 And U3)

    U1 & U3. You must configure jumper headers W1, W7, W8, W11, and W19 for correct data RAM operation. Paragraphs 3.2.1.1 through 3.2.1.5 give detailed descriptions of the jumper header settings for devices in the data RAM sockets. M68MPFB1632/D...
  • Page 31 MEMORY CONFIGURATION WORD CONFIGURATION, 32-PIN, 600 MIL BYTE CONFIGURATION, 28-PIN, 600 MIL WORD CONFIGURATION, 28-PIN, 300 MIL BYTE CONFIGURATION, 32-PIN, 300 MIL Figure 3-2. Data RAM Device Configuration M68MPFB1632/D...
  • Page 32 U3 (word mode). 3. If no device is in the U1 socket or no jumper on jumper header W11 pins 1 and 2, you may use the CS3 pin in the wire-wrap area; otherwise, you must disable the field. M68MPFB1632/D...

  • Page 33: Data Ram Memory Size Select Header (W1)

    CS0. If you do not want this functionality, remove the fabricated jumper and connect an alternate chip select to W7 pin-2. Removing W7 without connecting an alternate chip select provides write protection for memory at location U3. U3 Write Enable Fabricated Jumper M68MPFB1632/D...

  • Page 34: Data Ram Output Enable Select Header (W8)

    CS3. If you do not want this functionality, remove the fabricated jumper and connect an alternate chip select to W11 pin-2. Removing W11 without connecting an alternate chip select provides write protection for memory at location U1. U1 Write Enable Fabricated Jumper M68MPFB1632/D...

  • Page 35: A19 Disconnect Select Header (W19)

    ROM and data RAM sockets. In this setting, 512K x 16 memory operation (data RAM and pseudo ROM) may not function properly if the MCU’s A19 pin is set to its alternate functions (CS6 or PC3). Logic Low Fabricated Jumper M68MPFB1632/D...

  • Page 36: Pseudo Rom Configuration (U2 And U4)

    All reads, Word writes Word writes LSB byte writes MSB byte writes Byte - 8 Bit De-selected by PAL All reads, Use U4A socket All word writes All byte writes 1) Qualified by a valid MCU chip select. M68MPFB1632/D 3-10...
  • Page 37 Jumper headers W2, W3, W4, W10, W12, W14, W18, and W19 effect pseudo ROM operation and need to be set appropriately. Paragraphs 3.2.2.1 through 3.2.2.8 give detailed descriptions of the jumper header settings for devices in the pseudo ROM sockets. M68MPFB1632/D 3-11...
  • Page 38 MEMORY CONFIGURATION WORD CONFIGURATION, 32-PIN, 600 MIL BYTE CONFIGURATION, 28-PIN, 600 MIL WORD CONFIGURATION, 28-PIN, 300 MIL BYTE CONFIGURATION, 32-PIN, 300 MIL Figure 3-3. Pseudo ROM Device Configuration M68MPFB1632/D 3-12...

  • Page 39: Pseudo Rom Pin 1 Select Header (W2)

    1 and 2 for 28-pin packages. When using 32-pin memory devices in the pseudo ROM sockets move the jumper to pins 2 and 3. W3 connects either device power or an address signal for the appropriate device. 28 Pin 32 Pin Fabricated Jumper M68MPFB1632/D 3-13...

  • Page 40: Pseudo Rom Port Size Select Header (W4)

    W10 in conjunction with jumper header W12 selects the proper signals for the memory devices in the pseudo ROM sockets. (If no jumper or more than one jumper is installed, MCU RESET is held low and LED DS2 lights.) EPROM EEPROM Fabricated Jumper M68MPFB1632/D 3-14...

  • Page 41: Pseudo Rom Memory Size Select Header (W12)

    (via W10 & W12) is not supported, MCU RESET is held low and LED DS2 lights.) 32K x 8 64K x 8 6 128K x 8 256K x 8 512K x 8 Fabricated Jumper M68MPFB1632/D 3-15...

  • Page 42: Pseudo Rom Chip Select Header (W14)

    ROM sockets, reposition the W14 jumper to select pins 2 and 3 of the desired MCU chip select. For information regarding fast RAM chip selects refer to paragraph 3.2.3.1. CSBOOT CS1/CSM CS2/CSE CS10 FAST PSEUDO M68MPFB1632/D 3-16...

  • Page 43: Pseudo Rom Write Protection Select Header (W18)

    Jumper NOTE If write protect is enabled you will not be able to write to the pseudo ROM while executing user code. You can still write to pseudo ROM (using the ICD command set) via the BDM interface. M68MPFB1632/D 3-17...

  • Page 44: A19 Disconnect Select Header (W19)

    ROM and data RAM sockets. In this setting, 512K x 16 memory operation (data RAM and pseudo ROM) may not function properly if the MCU’s A19 pin is set to its alternate functions (CS6 or PC3) Logic Low Fabricated Jumper M68MPFB1632/D 3-18...

  • Page 45: Fast Ram Configuration (U9 And U10)

    NOTE The memory configurations shown in Figure 3-4 are only three of the possible methods for configuring memory in sockets U9 & U10. M68MPFB1632/D 3-19...
  • Page 46 MEMORY CONFIGURATION 32-PIN, 400 MIL 28-PIN, 300 MIL 400 SOJ SOCKET 32-PIN, 400 MIL Figure 3-4. Fast RAM Device Configuration M68MPFB1632/D 3-20...

  • Page 47: Fast Ram Chip Select Header (W14)

    RAM sockets, reposition the W14 jumper to select pins 1 and 2 of the desired MCU chip select. For information regarding pseudo ROM chip selects refer to paragraph 3.2.2.6. CSBOOT CS1/CSM CS2/CSE CS10 FAST PSEUDO M68MPFB1632/D 3-21...

  • Page 48: Mpfb Memory Devices

    GND 16 — — — — A2 10 A1 11 A0 12 D1 13 D2 14 D3 15 GND 16 1. An asterisk (*) on a signal indicates an active low signal. Figure 3-5. MPFB Supported RAM Devices M68MPFB1632/D 3-22...
  • Page 49 A0 12 D1 13 D2 14 D3 15 GND 16 1. Memory function not supported; driven to a logic high. 2. An asterisk (*) on a signal indicates an active low signal. Figure 3-6. MPFB Supported EPROM Devices M68MPFB1632/D 3-23...
  • Page 50 D3 15 GND 16 GND 16 A2 10 A1 11 A0 12 D1 13 D2 14 D3 15 GND 16 1. An asterisk (*) on a signal indicates an active low signal. Figure 3-7. MPFB Supported EEPROM Devices M68MPFB1632/D 3-24...

  • Page 51: Chapter 4 Rs-232 I/O Port Configuration

    W20 and W23. (An example of DCE is a modem and DTE a computer terminal). The I/O port connectors are J21 and J22. J21 (port 1) is a DB-9 connector and J22 (port 2) is a DB-25 connector. While the wire-wrap connector J23 lets you define the RS-232 circuitry connections to the MCU. M68MPFB1632/D...

  • Page 52: Rs-232 Port 1 Protocol Select Header (W20)

    DTE SETTINGS. For custom interface configurations, remove necessary jumpers and wire wrap pins as needed (refer to the schematic for W20 pin assignments). DCE SETTINGS DTE SETTINGS SAME HEADER WITH DIFFERENT CONFIGURATION M68MPFB1632/D...

  • Page 53: Rs-232 Port 2 Protocol Select Header (W23)

    DTE SETTINGS. For custom interface configurations, remove necessary jumpers and wire wrap pins as needed (refer to the schematic for W23 pin assignments). DCE SETTINGS DTE SETTINGS SAME HEADER WITH DIFFERENT CONFIGURATION M68MPFB1632/D...
  • Page 54 RS-232 I/O PORT CONFIGURATION J21/J22 U15/U16 W20/W23 DCE Protocol Fabricated Jumpers J21/J22 U15/U16 W20/W23 DTE Protocol Fabricated Jumpers Figure 4-1. DCE/DTE Protocol Wiring Diagrams M68MPFB1632/D...
  • Page 55 To use connectors J21 or J22, make sure to connect the appropriate MCU signals to jumper header J23. The drawing below shows signal assignments for connector J21. For J21 pin assignments and signal descriptions, refer to Chapter 7. Figure 4-2. RS-232 Port Connector J21 (Port 1) M68MPFB1632/D...
  • Page 56 18 NC DSR 6 19 NC GND 7 20 DTR DCD 8 21 NC NC 9 22 NC NC 10 23 NC NC 11 24 NC NC 12 25 NC NC 13 Figure 4-3. RS-232 Port Connector J22 (Port 2) M68MPFB1632/D...
  • Page 57 RS-232 I/O PORT CONFIGURATION The drawing below represents correct flow of signals for connector J22. TERMINAL / COMPUTER Figure 4-4. RS-232 Cable Assembly (Optional) M68MPFB1632/D...

  • Page 58: Serial Data Wire-Wrap Connection (J23)

    (input or output) is determined by the port definition, DCE or DTE. This implies that RS-232 RXD can be an output pin. When you interface the MCU to J23, the MCU’s RXD pin is always serial data input. M68MPFB1632/D...
  • Page 59 W20 / U15 / Port 1 Port 2 Port 1 Port 2 → → → → ← ← ← → → → ← ← ← → → → ← ← ← Figure 4-6. J23 Port Connections for DTE Operation M68MPFB1632/D...

  • Page 60: Advanced Rs-232 Configuration

    RI is available for the MCU at J23 pin 2. Because W20 and W23 are connected directly to U15 and U16, it is recommended you connect to W20 or W23. Refer to the schematic for detailed connections of W20 or W23. M68MPFB1632/D 4-10...
  • Page 61 DCD signal is sent to the receiver (see Figure 4-7). The DSR signal on pin 8 of W20 or W23 is open and not connected. NOTE Connecting two transmitters together may cause damage to the system. When making RS-232 connections always check the flow of each signal. M68MPFB1632/D 4-11...
  • Page 62 W20 / U15 / Port 1 Port 2 → → → → DSR Selection J21 / W20 / U15 / Port 1 Port 2 → → → → DCD Selection Figure 4-7. DCD/DSR Selection Using a DTE Port M68MPFB1632/D 4-12...

  • Page 63: Chapter 5 Eeprom Programming

    Jumper header W13 lets you disconnect the MCU Vfpe pin(s) from the VPP supply. This is required when your flash EEPROM memory device voltage exceeds MCU input voltage ratings. Applying voltages higher than those recommended by Motorola for proper MCU operation, could damage the MCU and cause MCU flash EEPROM programming failures. If the VPP voltage needed is greater than +12V you can either modify the resistor feedback values (as described above) or connect an external supply to W2 pin 3.

  • Page 64: Vpp-Mcu Select Header (W13)

    If W13 is removed, a protection diode provides a default +5Vdc power source to the VPP pin of the MPB MCU. This protects the Vfpe pin on MCUs with internal EEPROM. The Vfpe pin must be maintained within a diode drop of VDD, otherwise the Vfpe pin may be damaged. M68MPFB1632/D...

  • Page 65: Flash Eeprom Voltage Control Switch (S1)

    4. When your program is ready to control VPP, turn ON S1 and execute your programming algorithm. 5. When done, turn S1 OFF before turning the MPFB power OFF. Otherwise the low voltage indicator (MC34164) will turn VPP OFF when +5Vdc drops to +4.5Vdc. M68MPFB1632/D...
  • Page 66 EEPROM PROGRAMMING M68MPFB1632/D...

  • Page 67: Chapter 6 Port Replacement Unit Operation

    If you are going to use bus grant acknowledge (BGACK), CSE’s secondary function on most MCUs, then disable the PRU via W5 (see paragraph 6.4.1). If you do not disable the PRU, you will get read memory collisions from the PRU when the BGACK signal goes low. M68MPFB1632/D...

  • Page 68: Jumper Header Configuration

    MEVB circuit always enables the PRU during reset. This lets the PRU drive the reset data values onto the data bus (RD0 - RD2 and RD8 - RD15). After reset the PRU OEALL pin returns to the state you have selected using W5. M68MPFB1632/D...

  • Page 69: Pru Reset Data Control Header (W6)

    For group 2 signals, when the MEVB logic recognizes reset, any data bus pin (D3 - 7) is driven low if its associated reset data control input (RD3 - 7) is tied low. If a reset data control pin is high, the corresponding data bus pin is disconnected from the MEVB logic letting it float. M68MPFB1632/D...
  • Page 70 If a data bus pin is overloaded then the MCU will not read a high state (logic 1) as a reset data value. The drawing below shows the factory configuration. RD10 RD11 RD12 RD13 RD14 RD15 M68MPFB1632/D...

  • Page 71: Introduction

    Logic analyzer connector J11 Table 7-17. RS-232 DB-9 port connector J21 Table 7-8. Logic analyzer connector J12 Table 7-18. RS-232 DB-25 port connector J22 Table 7-9. Logic analyzer connector J13 Table 7-19. Serial data wire-wrap connector Table 7-10. Logic analyzer connector J14 M68MPFB1632/D...
  • Page 72 INSTRUCTION FETCH for CPU32-based MCUs. VOLTAGE DRAIN – DRAIN – ICD system power. DEVELOPMENT SERIAL OUT – Serial data output signal for background debug mode. Signal is also: INSTRUCTION PIPE 0 for CPU16-based MCUs. INSTRUCTION PIPE for CPU32-based MCUs. M68MPFB1632/D...
  • Page 73 H outputs. 4 – 11 PH7 – PH0 PORT H I/O SIGNALS – PRU replacement of the Port H function. 12 – 19 PG7 – PG0 PORT G I/O SIGNALS – PRU replacement of the Port G function. GROUND M68MPFB1632/D...
  • Page 74 During a write cycle, indicates that valid data is on the data bus. 4 – 19 D15 – D0 DATA BUS BITS 15 – 0 – MCU bi-directional data bus lines. GROUND M68MPFB1632/D...
  • Page 75 MCU and external devices. DSACK0 DATA AND SIZE ACKNOWLEDGE 0 – Active-low input signal that allows asynchronous data transfers and dynamic bus sizing between the MCU and external devices. M68MPFB1632/D...
  • Page 76 CHIP SELECT 2 – Output signal that selects peripheral or memory devices at programmed addresses. EMULATOR CHIP SELECT – Active-low output signal asserted low whenever a port A, B, E, G, or H data or data direction register is addressed. GROUND M68MPFB1632/D...
  • Page 77 INTERNAL MODULE CHIP SELECT – Active-low output signal that selects an external emulation device at internally-mapped address. CSBOOT BOOT CHIP SELECT – Active-low output signal that selects peripheral or memory devices at programmed addresses. CLKOUT SYSTEM CLOCK OUTPUT – MCU internal clock output signal. M68MPFB1632/D...
  • Page 78 PORT E BIT 3 – I/O signal for MCU port E. SPARE No connection 9 – 15 — These signals originate from the MAPI bus and are defined by the MCU installed on the MPB. Refer to the MPB user's manual. 16 – 19 SPARE No connection GROUND M68MPFB1632/D...
  • Page 79 These signals originate from the MAPI bus and are defined by the MCU installed on the MPB. Refer to the MPB user's manual. 17 – 19 SPARE No connection GND2 GROUND or VSSA as defined by the MPB. Refer to the MPB user's manual. M68MPFB1632/D...
  • Page 80 SIGNAL 1 – 4 SPARE No connection 5 – 18 — These signals originate from the MAPI bus and are defined by the MCU installed on the MPB. Refer to the MPB user's manual. SPARE No connection GROUND M68MPFB1632/D 7-10...
  • Page 81 DATA CARRIER DETECT – Output signal to the DTE device that indicates an acceptable carrier signal. 9 – 19, 21 – 25 ----- No connection DATA TERMINAL READY – Input for receiving on- line/in-service/active status from the DTE device. M68MPFB1632/D 7-11...
  • Page 82 Input, CTS value driven at Port 1 (W20 = DCE) Input, RTS value driven at Port 1 (W20 = DTE) P2-TX2 Input, CTS value driven at Port 2 (W22 = DCE) Input, RTS value driven at Port 2 (W22 = DTE) M68MPFB1632/D 7-12...

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