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8 Signal Flows in the BTS
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The satellite receiver of the BCKM receives 1 pulse per second (PPS) synchronization
signals from GPS and GLONASS satellites through the satellite antenna. Then, the CLKM
processes the 1PPS signals to generate 2S and 16Fc clock signals (19.6608 MHz) required
by the CCPM or CECM and outputs 2S and 10 MHz signals for testing.
The BCIM obtains 25 MHz clock signals from the clock bus.
The CCPM or CECM obtains 2S signals, 25 MHz signals, and 16Fc signals from the clock
bus. Then, the CCPM or CECM converts these signals into internal clock signals that it
requires and 100Fc clock signals that other boards require. The 2S signals are sent to the
logic, which converts them into the signals required by the processing chip.
Through the SFP port, the STRM uses the internal chip to obtain 100Fc clock signals from
the CCPM or CECM. Then, the 100Fc clock signals are converted into 12.288 MHz clock
signals after undergoing 10 frequency division. Through phase locking, the 12.288 MHz
clock signals are converted to 10 MHz clock signals, used by the RF part, and 64Fc clock
signals, used by the intermediate frequency (IF) part.
If ODU cascading is used, the ODUs obtain 100Fc clock signals from the CCPM or CECM.
Huawei Proprietary and Confidential
Copyright © Huawei Technologies Co., Ltd
Airbridge BTS3606C CDMA Base Station
Product Description
Issue 03 (2008-02-25)
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