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5
C551
27p-NC
UCLK
R550
X550
1M-NC
14.318MHz-NC
UCLK2
C552
D
27p-NC
+5V
+5V
R553
C553
R552
+
10U/16V
10K
10K
RST
MSCL
R551
MSDA
1K
MSCL
C
P3,6,7,8,9
MSCL
MSDA
P3,6,7,8,9
MSDA
P2,6
PAN_BRI
PAN_BRI
Keypad interface
CN550
C556
C557
C558
C559
KEY BD
.01U
.01U
.01U
.01U
1
2
B
3
4
5
6
7
8
Remote control interface
R554
1
R555
2
3
4
5
CN552
C567
C566
C564
C565
IR BD
NC
.01U
NC
NC
A
5
4
+5V
+5V
C550
0.1U
U550
SM59264
MPU
EA/VP
35
EA/VP
P0.0
P0.1
UCLK
21
X1
P0.2
P0.3
P0.4
UCLK2
20
X2
P0.5
P0.6
P0.7
RST
10
RESET
P2.0
P2.1
/INT0
14
INT0
P2.2
IR_DAT
15
INT1
P2.3
MUTE_S
16
T0
P2.4
(SOURCE )
OSD_S0
17
T1
P2.5
P2.6
2
P1.0
P2.7
3
P1.1
(POWER )
OSD_S7
4
P1.2
RD
(OSD)
OSD_S6
5
P1.3
WR
(UP)
OSD_S5
6
P1.4
PSEN
(DOWN)
OSD_S4
7
P1.5
ALE/P
OSD_S3
(+)
8
P1.6
TXD
(-)
OSD_S2
9
P1.7
RXD
1
NC
NC
12
NC
NC
RP550
47K *4
C560
C561
C562
.01U
.01U
.01U
OSD_S7
OSD_S6
OSD_S5
OSD_S4
OSD_S3
OSD_S2
OSD_S0
510
PWR_G
+5V
510
PWR_Y
RP551
IR_DAT
47K *4
R558
Q551
4.7K
PMBT3904
MPU_G
B
B
PWR_G
SOT
C
C
23
E
E
R559
Q552
4.7K
PMBT3904
MPU_Y
B
B
PWR_Y
SOT
C
C
E
23
E
4
3
+5V
AD0
43
AD1
42
AD2
41
AD3
40
AD4
39
AD5
R561
R560
38
AD6
10K
10K
37
AD7
36
MPU_Y
24
MPU_G
25
DSUB_DET
D_DET
26
R562
0
27
28
29
30
MCU_BRI
PAN_BRI
31
R567
1K-NC
/RD
19
/WR
18
32
ALE
33
TXD
13
RXD
C554
11
100p
23
34
+5V
+5V
C555
0.1U
1
8
A0
VCC
2
7
A1
WP
3
6
A2
SCL
4
5
GND
SDA
+5V
U551
24C16
Debug port
+5V
+5V
CN551
R556
NC
510
1
2
RXD
3
TXD
4
+5V
Debug port
Pitch 2.54mm
R557
510
3
2
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
MUTE_S
D_DET
RST
ALE
/INT0
/WR
/RD
UCLK
UCLK2
R568
0-NC
+5V
MSCL
MSDA
GNDM
Debug port (IIC)
CN553
NC
+5V
MSCL
1
2
3
MSDA
4
IIC Debug
Pitch 2.54mm
Title
SCHEMATIC, CTRL/B VTV-L702,SLV87E
Size
Document Number
B
Date:
Friday, December 05, 2003
2
1
AD[0..7] P2
MUTE_S P7
D_DET
P8
RST P2
ALE P2
/INT0 P2
/WR P2
/RD P2
UCLK P2
OSC1 P2
L552
HI0805N310
GNDP
L551
HI0805N310
GND_AO
Power
Plane
: +5 V
Ground Plane
: GND
Rev
1C
401AB0
Sheet
5
of
9
1
D
C
B
A
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