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Sony SEQ-555ES Service Manual page 13

Program equalizer

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Pin @ is the output
pin for reset signal to micro-
computer C.
Pin @ is the output pin for the signal which turns
power supply switch relay ON/OFF.
Pins
@)~
@
are
microcomputer
C
data
output
pins,
and
microcomputer
C outputs
an end signal
after receiving the data. Pins
@0 receives this signal.
Pin @0 is the microcomputer
A clock signal input
pin.
Pin @) is the microcomputer A serial data input pin.
Pin @3 is the output
pin for serial data to micro-
computer A.
Pins
64 ~ @) are
input
pins for address (of each
frequency) data from microcomputer D.
Pins
63 ~ @
are input pins for the control signal
sent from
microcomputer
D to the A/D converter.
Pin G8 is the A/D converter END
signal input pin.
Pin
is the
input
pin for A/D
converted
data.
Pin @ is the chip enable signal input pin.
Pin @
is the A/D
converter start signal input pin.
Pins
@ ~
are output pins for data to the RAM.
Pins
60 ~ 6) are output pins for the address signals
to the RAM.
Pins 68 and 69 are RAM R/W signal output pins.
IC493 CX-7978
CX-7978 is a 2dB step low distortion ratio electronic
volume, with two circuits each of which can obtain
0 ~ 78dB, oo attenuation.
Pin Functions:
IN, OUT(@,@,@,@)_
Audio signal 1/O pins.
CS (@,®)
Chip select pins;
the chip is se-
lected when serial data bit 9 and
bit 10 match CS,, CS, pin levels.
"0" = Vss
*°1? = OPEN or Voi
M/S (@)
Serial data input mode switching
pin (11 bit input when OPEN or
Vo )-
Vor (@)
Power supply (higher voltage than
Vss).
Vss (®)
Power supply (-14V).
CLOCK (@)
Clock signal input; takes in data
at clock signal rise.
DATA (@ )
Serial data input pin.
Strobe ( @ )
Strobe signal input pin. The data
taken
into
the
IC is latched
at
the
rise
of this pulse,
and
the
internal switch goes on according
to the data.
Lvref ( @))
Sets
control
signal (clock, data,
strobe) input level range.
Vop ( @)
Power supply (+14V).
SEQ-555ES
Control Data Structure
11
3
2
1
10
9
8
7
6
5
4
CS2|
CS: pe [|
8dB step data
te step
ata
|
bit
m
bit
aio |_ bit
position
position
Sd
position
87
6543
21
no change
odB
|0000|{
oa | 00]
16 dB
0010
24 dB
0011
32 dB
0100
The attenuation
amount is the sum of 8dB step and
2dB step.
ICs}. (TC4052BP)
The ICs; truth table is given below.
IN HIBIT
B
A
ON
CHANNEL
L
L
eH
1X,
1Y
L
H
L
2X,
2Y
On this model, it can only be used under the condi-
tions shown inside the
.
The voltage output from ICs
is divided and applied
respectively to OX, 3Y/3X, OY.

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