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XL-MP80H/MP80E
IC801 VHIMN6627933C: CD Digital Signal Processor (MN6627933C)
ADPVCC
RFENV
NRFDET
PWMSE
*
SPPO
SPOU
*
* T RV
* TRVM
TMO
TMO
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
BLKCK *
76
SMCK *
77
PMCK *
78
TX *
79
FLAG *
80
NRST
81
NTEST
82
DVSS3
83
X1
84
X2
85
IOVDD2
86
DVDD2
87
M N 6 6 2 7 9 3 3 C G
D2
88
D1
89
D0
90
D3
91
D4
92
D5
93
D6
94
D7
95
D15
96
D14
97
DRVDD2
98
D13
99
D12
100
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
* *
NTEST
TIMING
MICRO COMPUTER
NRST
GENERATOR
INTERFACE
A/D
FE
CONVERTER
TE
SERVO
CPU
OF
T
INPUT PORT
BDO
L
L
T
MP3
TRV
P
DECORDER
TRV
M
P2
2
OUTPUT
TR
P
FS
PORT
*
TR
M
CONVERTER
FO
P
FO
M
*
TBA
L
FBA
L
LDO
N
DIGITAL FILTER
* T
X
DIGITAL OUT
1bit
PWM LOGIC
*
EX
T0
*
EX
T1
ANALOG
*
EX
T2
LOWPASS
N1
FILTER
N2
Figure 7 BLOCK DIAGRAM OF IC
DS
L
PLL VCO
SPINDLE
EFM DEMODULATION
SUBCODE
SERVO
SYNC INTERPOLATION
INTERFACE
CIRC ECC
CDROM ECC
CIRC
RAM
BUS CONTROL UNIT
(BCU)
DRAM
ADPCM
INTERFACE
SERIAL OUTPUT
INTERFACE
DAC
REGULATER
8 – 8
50
AVDD
49
BDO
48
OFT
47
NRFDET
46
LDON
45
RFENV
44
ADPVCC
43
TE
42
FE
41
FBAL
40
TBAL
39
IOVDD1
38
FOM *
37
FOP
36
TRM *
35
TRP
34
TRVM2 *
33
TRVP2 *
32
TRVM *
31
TRVP
30
SPPOL *
29
SPOUT
28
DVDD1
27
BA0 *
26
BA1 *
TXTCK
(EXT1)
TXTD
(EXT0)
DQSY_ TXT
(EXT2)
SBCK
(EXT1)
SUBC
(EXT0)
TXNCLDCK
(EXT2)
*
FLAG
*
BLKCK
A11~ A0
D15~D0
NCAS
NRAS
NWE
NCS
SDRCK
* BA0
* BA1
UDQM
LDQM
DRVDD1
DRVDD2
LRCK(EXT1)
BCLK(EXT2)
SRDATA
(EXT0)
DVDD
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