Shared Memory; Cache Memory - Hitachi Universal Storage Platform V Reference Manual

Shared Memory

The nonvolatile shared memory contains the cache directory and configuration
information for the USP V/VM storage system. The path group arrays (for
example, for dynamic path selection) also reside in the shared memory. The
shared memory is duplexed, and each side of the duplex resides on the first
two shared memory cards, which are in clusters 1 and 2. In the event of a
power failure, shared memory is protected for at least 36 hours by battery
backup.
The Universal Storage Platform V can be configured with up to 32 GB of shared
memory, and the Universal Storage Platform VM can be configured with up to
16 GB of shared memory. The size of the shared memory is determined by
several factors, including total cache size, number of logical devices (LDEVs),
and replication function(s) in use. Any required increase beyond the base size
is automatically shipped and configured during the installation or upgrade
process.

Cache Memory

The Universal Storage Platform V can be configured with up to 512 GB of
cache, and the Universal Storage Platform VM can be configured with up to
128 GB of cache memory. All cache memory in the USP V/VM is nonvolatile
and is protected for at least 36 hours by battery backup.
The Universal Storage Platform V and VM storage systems place all read and
write data in cache. The amount of fast-write data in cache is dynamically
managed by the cache control algorithms to provide the optimum amount of
read and write cache, depending on the workload read and write I/O
characteristics.
The cache is divided into two equal areas (called cache A and cache B) on
separate cards. Cache A is in cluster 1, and cache B is in cluster 2. The
Universal Storage Platform V/VM places all read and write data in cache. Write
data is normally written to both cache A and B with one channel write
operation, so that the data is always duplicated (duplexed) across logic and
power boundaries. If one copy of write data is defective or lost, the other copy
is immediately destaged to drive. This "duplex cache" design ensures full data
integrity in the unlikely event of a cache memory or power-related failure.
Mainframe hosts can specify special attributes (for example, cache fast write
(CFW) command) to write data (typically sort work data) without write
duplexing. This data is not duplexed and is usually given a discard command
at the end of the sort, so that the data will not be destaged to the drives.
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Hitachi Universal Storage Platform V/VM User and Reference Guide
Architecture and Components