Sony XR-C9100R Service Manual
Fm/mw/lw cassette car stereo
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Also See for XR-C9100R:
- Operating instructions manual (172 pages) ,
- Service manual (60 pages) ,
- Installation (4 pages)
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SERVICE MANUAL
Cassette player section
Tape track
4-track 2-channel stereo
Wow and flutter
0.08 % (WRMS)
Frequency response
30 - 20,000 Hz
Signal-to-noise ratio
Cassette type
Dolby B NR
TYPE II, IV
67 dB
TYPE I
64 dB
Tuner section
FM
Tuning range
87.5 -108.0 MHz
Antenna terminal
External antenna connector
Intermediate frequency
10.7 MHz
Usable sensitivity
8 dBf
Selectivity
75 dB at 400 kHz
Signal-to-noise ratio
65 dB (stereo),
68 dB (mono)
Harmonic distortion at 1 kHz
0.7% (stereo),
0.4% (mono)
Separation
35 dB at 1 kHz
Frequency response
30 - 15,000 Hz
MICROFILM
SPECIFICATIONS
Dolby C NR
Dolby NR off
73 dB
61 dB
70 dB
58 dB
FM/MW/LW CASSETTE CAR STEREO
FM/MW/SW CASSETTE CAR STEREO
XR-C9100R
Model Name Using Similar Mechanism
Tape Transport Mechanism Type
MW/LW (AEP, UK model)
Tuning range
MW: 531 - 1,602 kHz
LW: 153 - 281 kHz
Aerial terminal
External aerial connector
Intermediate frequency
10.71 MHz/450 kHz
MW: 30 µV
Sensitivity
LW: 50 µV
MW/SW (German model)
Tuning range
MW: 531 - 1,602 kHz
SW: 5,950 - 6,205 kHz
Aerial terminal
External aerial connector
Intermediate frequency
10.71 MHz/450 kHz
MW: 30 µV
Sensitivity
SW: 50 µV
Power amplifier section
Outputs
Speaker outputs
(sure seal connectors)
Speaker impedance
4 - 8 ohms
45 W × 4 (at 4 ohms)
Maximum power output
– 1 –
AEP Model
UK Model
XR-C8100R
MG-25D-136
– Continued on next page –
AEP, UK Model
German Model
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Summary of Contents for Sony XR-C9100R
- Page 1 XR-C9100R SERVICE MANUAL AEP Model UK Model Model Name Using Similar Mechanism XR-C8100R Tape Transport Mechanism Type MG-25D-136 SPECIFICATIONS Cassette player section MW/LW (AEP, UK model) Tuning range MW: 531 - 1,602 kHz Tape track 4-track 2-channel stereo LW: 153 - 281 kHz Wow and flutter 0.08 % (WRMS)
- Page 2 6-3. IC PIN DESCRIPTION • IC600 MB90574PFV-G-134-BND (SYSTEM CONTROL) Pin No. Pin Name Pin Description SEKOUT SEEK OUT output AF-SEEK AF SEEK output WIDE WIDE/NARROW select output ST-MONO Use a thing both as ST-IND display input and force MONO output. TUNMUTE Tuner mute output FM-ON...
- Page 3 Pin No. Pin Name Pin Description — Power supply pin (+5 V) RAMBU RAM reset detection input POWSEL Power select initial setting input EQ-SEL Equalizer connection : “H” TESTIN Test mode setting detection input PACK-IND Door indicator output TIRPLAY TIR playback audio line select output 61, 62 SUB-SW1, 0 Simple SUB WOOFER control output 1, 0...
- Page 4 Pin No. Pin Name Pin Description TAPEON Tape power control output N-ROUT Tape forward/reverse detection output AMSON Tape AMS control output DOLBC Tape DOLBY B/C select control output DOLBY Tape DOLBY control output ONNIN-REQ Space condition indicate signal input for voice synthesizer IC. LEDON Front panel LED control output —...
- Page 5 XR-C9100R 6-7. SCHEMATIC DIAGRAM — MAIN SECTION (1/5) — • Refer to page 53 for IC Block Diagrams. (Page 42) – 37 – – 38 –...
- Page 6 XR-C9100R 6-8. SCHEMATIC DIAGRAM — MAIN SECTION (2/5) — • Refer to page 53 for IC Block Diagrams. (Page 43) – 39 – – 40 –...
- Page 7 XR-C9100R 6-9. SCHEMATIC DIAGRAM — MAIN SECTION (3/5) — • Refer to page 53 for IC Block Diagrams. (Page 38) – 41 – – 42 –...
- Page 8 XR-C9100R 6-10. SCHEMATIC DIAGRAM — MAIN SECTION (4/5) — • Refer to page 53 for IC Block Diagrams. (Page 39) (Page 47) (Page 47) (Page 48) (Page 47) – 43 – – 44 –...
- Page 9 XR-C9100R 6-11. SCHEMATIC DIAGRAM — MAIN SECTION (5/5) — • Refer to page 53 for IC Block Diagrams. – 45 – – 46 –...
- Page 10 XR-C9100R 6-13. SCHEMATIC DIAGRAM — INVERTER/SUB SECTION — D899 MA8062M (Page 44) (Page 51) (Page 44) (Page 44) (Page 44) – 48 –...
- Page 11 XR-C9100R 6-15. SCHEMATIC DIAGRAM — DISPLAY SECTION — (Page 48) – 51 – – 52 –...
- Page 12 • IC Block Diagrams IC101 MSM6685JSDR1 IC201 LB1638MTP-T2 IC10 BU2624FV-E2 IC310, 410 TDA8574(T) N.C. TEST TIMING REFRESH TIMER RS/A RWCK GENERATOR XOUT VCCL RFSH TEST OUT1 TEST REFRESH ADDRESS VCCL BUFFER 8,388,608DATA PHASE COUNTER REGISTER TEST CL– SVRL TEST LIFT ROW ADDRESS REFERENCE COLUMN DECODER...
- Page 13 IC250 CXA2511AQ IC350 CXA1846N-T4 20 19 13 12 11 – 8dB STEP 1dB STEP PBFB2 120µ/70µ MSMODE OFF/ VOLUME VOLUME PBRIN2 DRSW MS MODE NR BIAS LATCH BUFFER PBREF2 TAPESW LATCH CONTROL TAPE/AUX PBFIN2 INSW SHIFT TAPE EQ NRSW REGISTER NR MODE FWD/RVS PBGND...
- Page 14 IC900 MBM29F800-DISPU BYTE DQ15/A–1 8,388,608 CELL DECODER MATRIX DQ14 Y GATE DQ13 ADDRESS BUFFER LATCH DATA DQ12 DECODER LATCH DQ11 DQ10 CONTROL LOW VCC CIRCUIT DETECTOR CIRCUIT RESET WRITE/ERASE PULSE TIMER RY/BY WRITE CIRCUIT RY/BY ERASE CIRCUIT BUFFER CHIP ENABLE/ OUTPUT ENABLE CIRCUIT IC903 RSC-164...
- Page 15 IC901 MSM534001E-14TSKFDR3 32 OE 31 A10 30 CE CONTROL MEMORY CELL MATRIX DECODER 524,288 X 8 ADDRESS BUFFER MULTIPLEXER DECODER OUTPUT BUFFER 29 D7 28 D6 27 D5 26 D4 25 D3 24 VSS 23 D2 22 D1 21 D0 20 A0 19 A1 18 A2...