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(3) Signal Timing Chart
Moment when the power is turned on or when the reset button is
@ffi
pressed (except when
is pressed after an auto-power
-1
EXPRM
t--Tt--I
x:---x
DATA1-
.... _
DATA8~~-
STROBE
8. Block diagram
PC-l600
CE-I600F
(2.5"FDD)
,---
PTI .PUI .EZI
MINI.IORQ
MRQI.RDNI
WRNI
RSTI--~----4_------~--~
~-----
CSNO
off.)
Tl: approx. 20ms
T2: 1.5ms or more
T3: 1.5ms or more
T4: 15-20 µ.s
Centronics interface
NU
- -----,-- - - - - - - - - - - . - - -f -
107N
RSTN
[Fig.2) LR38045 block diagram gate array
(4) Electrical Requirements
Signal Levels
1.
Input signal: TTL level
Output signal: TTL level (capable of driving one TTL IC)
2.
1/0
Input signal:
Output signal:
Since all the outputs are through an open-collector,
1kn -
10kn)
(approx.
recommended
printers al ready include a pull-up resistor.
EA-l60
v« __
---!
(AC
ir
v rc
AAx5
PC-l600 '-- __
(SUM3x5)
..J
power supply circuit
11!Q
1
...
I'BO-7N
Bu
Mu
I'CO-7N
FFl-3
DCl-3
INT
RST
PAO-7I
PBO-7N
,
PC 0-7 N : 8 bi ts output
-f - .,
GNU
vcc
--
CE-1600E
V
cc
2.8K
M54514AP
or equivalent
a pull-up resistor
at
the
printer
is
required.
adapter)
1/0
: 8 bits
Buffer
: Mul t iplexer
: 8 bi ts Latch
Decorder
: Interrupt
circuit
: Reset
cireuit
: 8 bi ts input
: 8 bi ts output
port
port
SHARP
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