Related Manuals for Sony TVP-08
Summary of Contents for Sony TVP-08
- Page 1 Training Manual ® Projection Television Circuit Description and Troubleshooting Course: TVP-08...
- Page 2 Course Description and Troubleshooting: RA-4 Chassis Prepared by: National Training Department Sony Service Company A Division of Sony Electronics Inc. Course presented by______________________________________ Date___________________________________________________ Student Name ___________________________________________...
- Page 3 Sony Service Company A Division of Sony Electronics Inc ©1998 All Rights Reserved Printed in U.S.A. Sony and Trinitron are registered trademarks of Sony.
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Page 4: Table Of Contents
Table of Contents Features DC Protect AC Protect Overview Soft Start Picture Audio Overview Self-Diagnostics Soft Start - Power ON Converter Board Descriptions Overview Power Supply Block Operation AC Input T602 Secondary (Audio B+) Power ON Overview Converter Operation Regulation T601 Secondary-1 Protection Overview... - Page 5 Distribution M (Main) Bus Regulation P (Auto Registration) Bus MID Bus Overview Video Path Block Operation DC Protection Inputs Main Video Overview Sub-Video Shut Down IC511 Video Processor +135 Volt Over Voltage Input Switching +135 Volt Over Current Protection +19, +22, +7 Volt LVP Overview Inputs PS Troubleshooting...
- Page 6 Y Processing Sync Processing H and V Sync IK/AKB 3.58 MHz Overview Main YUV Switch Video Drive Overview Inputs Troubleshooting Output Selection Sync Paths DRC - Digital Reality Creation Overview DRC Block Sync Paths Deflection Block Overview Inputs Overview DRC Processing Vertical Outputs Horizontal...
- Page 7 Pin Amp Overview HV Drive Overview Peak Drive Pin Amp HV Regulation Control H Protect/HP Overview Overview Regulation Control +12 High Voltage LVP H Protect HV Regulation PWM Vertical Deflection Block Overview H BLK Delay and 1/2 H + Odd/Even Sawtooth Generator Overview H BLK Delay...
- Page 8 Sensor Amp Overview Auto Focus Circuit Description BD Input Overview Digital Convergence BD Output Overview IC1707 Regi Correction Convergence Out Overview Regi Mute Convergence Amp Service Mode Overview Normal Service Mode PJED Mode Protection Block Overview Diagnostic Indication Circuit Description...
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Page 9: Features
The two models share the following picture features: · · · · · Wideband Video Amplifier · · · · · Advanced Pro-Optic System – Sony technology that allows full cor- · · · · · Multi Image Driver – Digital-editing technology that provides versatil- ner to corner focusing. - Page 10 NOTES...
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Page 11: Self-Diagnostics
The number of times the LED blinks may correspond to that shown in the Self-Diagnostics following table: Overview Diagnosis item Standb y/ Self-diagnosis sleep lamp, screen displa y , The RA-4 chassis employs a Self-Diagnostic system that uses the Timer Number of b links Diagnosis item: Results LED and an on screen menu to help indicate where the problem with the... -
Page 13: Board Descriptions
Board Descriptions Overview The models covered by this manual are the new KP53XBR200 and the KP61XBR200. These two models are electrically identical. The differences have to do with screen size. The table below shows which circuits are present on each of the boards. This will help if you are doing board level (SAYS) or component level repair. - Page 14 D BD...
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Page 15: Power Supply Block
Converter Power Supply Block When the Oscillator circuit begins oscillating, it outputs two signals that are 180 degrees out of phase. These signals are applied to the converter AC Input circuit. The converter circuit contains two Driver ICs that drive two push pull transistor circuits. -
Page 17: Ac Input And Switching B
B+ Rectifier AC Input and Switching B+ When power is turned ON, the AC line voltage is applied across D602 Bridge Rectifier because RY6001 Power Relay is closed. D602/3 + out- Overview puts 130 volts which is filtered by C6008, C6010 and L6003. This volt- age is used as the B+ for the switching power supply converter circuit The AC Input and Switching B+ circuit is used to filter the AC line voltage and is fused by F6002. -
Page 19: Standby Power Supply
Standby Power Supply RM+5 As IC6001 PWMSW voltages are induced in the secondary windings of T6003 SRT, one of these voltages is used to develop the RM+5 line. The Overview signal from T6003/7 is rectified by D6120 and filtered by C6137, C6138 The Standby Power Supply is used to develop the voltages that are re- and L6113. -
Page 21: Vcc Switch (Power On)
DC Protect Vcc Switch (Power On) The DC protection latch circuit is connected through D6111 to the power ON line at the junction of R6112 and R6121. When the protection latch Overview is activated, it pulls the O Relay line LOW and turns power OFF by turn- ing and holding Q6014 OFF. -
Page 23: Soft Start
Soft Start Soft Start - LVP The soft start circuit can also be activated if the voltage from D602/3 Switching B+ goes too low. When the voltage across R6007 drops below Overview 12.6 volts, it will cause Q6002 to turn OFF. This causes Q6003 to turn A Soft Start circuit is necessary to keep the oscillator that drives the switch- ON. -
Page 25: Converter
If IC6002/7 is outputting a High signal, then Q6008 turns ON. When Converter Q6008 is ON, it allows the 130-volt Switching B+ to be present at Q6008/ S. This voltage is applied to IC6002/6, the floating supply input, and also to C6022 and C6023. -
Page 27: T602 Secondary (Audio B+)
Troubleshooting T602 Secondary (Audio B+) If the rest of the power supply is working, but there is a problem with these supplies, you should suspect a problem on the K board. The set can be Overview run with CN6102 unplugged. If the correct voltages are measured at CN6102, then the problem is on the K board. -
Page 29: T601 Secondary-1
+/- 22 Volts T601 Secondary-1 The voltage from the winding of T601/14 and 15 is applied across D6108 through PS6105 and PS6106. C6125, C6135 and L6112 filter the recti- Overview fied voltage. The voltage is used on the G board by the protection circuit There are four secondary windings on T601 PIT. -
Page 31: T601 Secondary-2
Distribution T601 Secondary-2 The table below shows the circuits that are powered by the voltages pre- viously discussed: +7 Volts The voltage from the winding of T601/17 and 18 is applied across D6109 Name Circuits through PS6101 and PS6102. C6117, C6126 and L6107 filter the recti- Def +5V regulator IC503, +5V regulator, 3.3V regulator fied voltage. -
Page 33: Regulation
Regulation If the voltage on the +135 volt line should rise, the resistance at IC1601/2 and ground will also rise. This causes the current through the internal LED of IC6005 to decrease, which decreases the brightness of the light. Overview The decrease in the brightness causes less current to flow through the C- E junction of the internal transistor inside IC6005. -
Page 35: Dc Protection
DC Protection +135 Volt Over Current Protection The over current protection circuit works by monitoring the voltage divider network that consists of R6110, R6103, R6104 and R6118. Essentially Overview we can look at this as the voltage across R6118 since the voltage at The RA-4 chassis employs protection for over and under voltage, as well IC6102/2 will change with it. -
Page 37: Ps Troubleshooting
because of OVP. If the voltage is below 50VAC, there will not be PS Troubleshooting enough voltage to turn on the power relay and it will chatter. The following table shows the voltages present with the supply fully un- Overview loaded and 55 volts AC applied. - Page 38 Location Normal Voltage Location Normal Voltage CN6102/2 and 3 -19 Volts CN6105/3 +15 Volts CN6102/7 and 8 +19 Volts CN6105/4 -15 Volts CN6104/2 +15 Volts CN6105/12 -22 Volts CN6104/4 and 5 +7 Volts CN6106/1 +135 Volts CN6104/7 +11 Volts CN6106/3 -135 Volts CN6104/9 +33 Volts...
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Page 39: Protection Block
The number of times the LED blinks may correspond to that shown in the Protection Block following table: Diagnosis item Standb y/ Self-diagnosis Overview sleep lamp, screen displa y , The RA-4 chassis employs a Self-Diagnostic system that uses the Timer Number of b links Diagnosis item: Results LED and an on screen menu to help indicate where the problem with the... -
Page 41: Circuit Description
This display can be cleared by pressing 8 and Enter in this mode. In addition to sending a signal to the OSD processor, all of these protect lines are connected to the power supply latch on the G board, except for There may be situations when the diagnostic system will not work. -
Page 43: Reset
Power ON Reset Reset When the set is powered ON, there is a LOW going reset pulse sent from IC1008/45 O RSTCTL to IC1009/60 I Reset that resets IC1009 OSD CPU. Overview This reset pulse is also sent to Q1015 Inverter. Q1015 inverts this pulse to a HIGH going reset pulse. -
Page 45: System Block Diagram
System Block Diagram Connector or IC MSDA MSCL CN518 (BM) CN521 (Bus Connector) Overview CN522 (BD) IC511 Video Processor This section discusses the System Block for the RA-4 chassis and will IC515 AV Switch show the four different I²C busses. The B bus is active during standby. IC1008 Main CPU The M bus is the main bus and controls most of the set. -
Page 47: Video Path Block
The outputs from IC1307 YUV Switch are then input to the BR board Video Path Block (DRC) and the BM board (MID). The BR board outputs signals that are the main video signal and these outputs are input to IC511 Video Proces- sor. -
Page 49: Input Switching
identical buffers before being input to IC515 A/V Switch. In addition, au- Input Switching dio is input to IC515 A/V Switch from each tuner. The tuners are not re- tuned for the audio swap function. Outputs Overview Main Video The two tuners’ video outputs, along with all video signals that enter the unit except the Video 5 component input, are input to IC515 A/V Switch. -
Page 51: Main Y And C Buffers
C Buffer Main Y and C Buffers The C signal is only present when an S video input is used. The C signal is passed through Q536, which is the output buffer for the input switching Overview circuit. It then goes to Q1345, which provides further buffering for the signal before it enters FL1302. -
Page 53: 3D Comb Filter
frame 20, we would compare it not only to line 139 and 141 in frame 20, 3D Comb Filter but also with line 140 in frames 19 and 21. This type of processing re- quires a great deal of memory since it must be capable of storing two full frames of video for the constant comparisons that are occurring. - Page 55 IC1306 3D Comb Filter The comb filter uses the memory controller for three different purposes. The first is to feed signals that are line delayed by 1H and 2H into the line The data from IC1309 ADC is input to IC1306/67-74 DYC02 – DYC09. (2D) comb filter.
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Page 57: Main Chroma Decoder
cuits are adjusted with data from the I²C circuit. The Y circuit is then Main Chroma Decoder output at IC1305/18 Y Out. The Y out signal is buffered by Q1321 and outputs its emitter to IC1307/1. H and V Sync Overview When the Y signal leaves IC1307/22 Sel Y, it is sent to Q1330 to be The purpose of IC1305 Main Chroma Decoder is more than just to de-... -
Page 59: Main Yuv Switch
Output Selection Main YUV Switch The select pins at IC1307/4 and 27 are tied together and receive their input from Q1343 which outputs a HIGH or a LOW depending on the Overview state of the FSC signal from IC1305 Main Chroma Decoder. If any of the inputs except Video 5 component input are selected, IC1307/4 and 27 will The purpose of IC1307 YUV Switch is to switch the appropriate YUV sig- be HIGH. -
Page 61: Drc - Digital Reality Creation
In reality, you don’t see the full 525 lines on the screen. Over 40 lines are the number of scanning lines with a circuit called a line doubler. Sony has consumed by the Vertical Blanking interval. This leaves roughly 480 lines been an active supplier of line doublers, particularly for professional video for the actual picture. - Page 62 A new solution: DRC ing both fields simultaneously in a 480-line “progressive” scan. Progres- Sony’s new Digital Reality Creation (DRC) circuitry is an all-new approach sive scanning combines the separate fields of odd-numbered lines and to the problem of visible scanning lines. Not only does DRC create a even-numbered lines.
- Page 63 Moreover, with DRC, each field is processed separately, so there’s never What it all means a need to compensate for motion between two fields. And while the dou- Digital Reality Creation circuitry greatly enhances the television viewing blers typically produce a scan of 480P, the DRC circuit produces a higher experience.
- Page 64 NOTES...
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Page 65: Drc Block
IC304 Up Converter along with 54 and 27 MHz clocks. The processing DRC Block done by IC462, IC463 and IC304 converts the video signals from normal NTSC to a near HDTV-like equivalent. Overview Outputs The DRC Block located on the BR board is a line doubling and pattern IC304 Up Converter outputs three component signals to CN301. -
Page 67: Mid - Multi Image Driver
VGA source. This is a proprietary images or HD and NTSC integrated circuit based on company expertise in broadcast-quality Digital Multi Effects systems. Some (but not all) Sony televisions with MID will enable viewers to combine two different signal formats on the same screen. - Page 68 13 channels simultaneously (12 inset still pictures plus one main picture in full motion). Sony’s Multi-image Driver bridges the gap between computing and television. You can surf the net at VGA resolution while you watch High Definition TV on the same screen.
- Page 69 · New Favorite Channel. Automatically shows your eight favorites or the last eight channels you’ve watched. · New Freeze Mode. Lets you freeze a broadcast screen to write down a telephone number or website URL while the program continues as a side-by-side TwinView picture.
- Page 70 NOTES...
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Page 71: Mid Block
MID Outputs MID Block Once the processing of the signal is complete, Y, U and V signals are output from the MID processor along with a MID YS signal. This signal is Overview used for positioning of the MID video signals into the picture. MID VS and HS signals are also output from the MID Controller. -
Page 73: Video Processor
49, 50, 51 and 52. These signals are the YM/YS and RGB signals for the Video Processor OSD. Video Outputs Overview The video signals that are input are combined to form a picture that is output as R, G and B signals from IC511/35, 37 and 39. These signals The purpose of IC511 Video Processor is to combine all of the signals are sent through buffers to CN701, which is connected to the CR board. - Page 75 to IC511/33 HP In and IC511/32 VBLK. These signals are used to phase lock the sync of the deflection circuits output to the output of the sync signals from IC511 Video Processor. In addition to this, the HBLK signal is applied to an OR circuit, along with the VBLK and HS Out signals to the SCP pulse.
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Page 77: Ik/Akb
signal the micro that it is no longer in a busy state and unblank the set. IK/AKB When IC511 unblanks the video, it outputs RGB of approximately 2 Vp-p from pins 35, 37 and 39. If there is a problem, the Timer LED will flash five times in accordance with the Self-Diagnostic function. -
Page 79: Sync Paths
The VS signal is input to the BM board and IC512 VDSP. This IC creates Sync Paths the vertical drive signal, which is output to the Vertical Output IC on the D board. Normally the vertical blanking signal would be created using the vertical boost pulse. -
Page 81: Deflection Block
Deflection Block High Voltage This set does not use the H Output to produce High Voltage. It has its own output stage that amplifies the H Drive signal and applies that output Overview to the FBT. The FBT creates High Voltage, Focus Voltage, ABL, Heater This block shows the basic deflection circuits and how they are intercon- Voltages and +210 Volts. -
Page 83: Horizontal Deflection Block
Horizontal Deflection Block A sample of the horizontal output signal is used by the HP/H Protect to produce the HP signal. The HP signal is fed back to the Horizontal Jungle to phase lock the Horizontal Drive and Horizontal Output. The H Protect Overview circuit uses the HP signal to detect proper operation of the horizontal circuits. -
Page 85: Horizontal Jungle
IC507/6 Filter 2 uses C543 to generate the comparison voltage, which is Horizontal Jungle compared to the sawtooth signal created by IC507/5 to create the output voltage at IC507/7 AFC Output. The output of this circuit is the H Drive signal, which exits at IC507/12. Overview This signal passes through an internal circuit that uses the voltage at IC507 Horizontal Jungle uses an internal oscillator to generate an H Drive... -
Page 87: H Out
The pin amp has an effect on the width of the picture since more current H Out is required to move the beam at the center of the tubes. The pin signal modulates a vertical parabola signal onto the H Out signal. This causes more current to flow through the yokes when the beam is towards the Overview center of the tube. -
Page 89: Pin Amp
through Q5017 C-E. This causes the signal at Q5017/C to become more Pin Amp positive. This signal is applied to Q5018/B. When the signal becomes more negative, it causes current to flow through Q5020 E-B junction and Q5018 E-B junction. When current flows through Q5020 E-B, it causes Overview current to flow through Q5020 C-E. -
Page 91: H Protect/Hp
circuit consisting of C5026, R5039, D5008 and C5020. As long as pulses H Protect/HP continue to be applied to this peak detect circuit, C5020 will hold a charge. The voltage from this charge is enough to keep Q5006 ON since it ap- plies .6 volts to Q5006/B. -
Page 93: Vertical Deflection Block
The VDSP circuit uses the VS and the ½ H signal to produce four outputs. Vertical Deflection Block The V Drive output is a sawtooth wave that is applied to the V Out circuit and then applied to the vertical yokes. The VTIM output is the vertical timing pulse. -
Page 95: H Blk Delay And 1/2 H + Odd/Even
½ H and Odd/Even H BLK Delay and ½ H + Odd/Even The output from IC517/6 is input to two pins on IC508 ½ H and Odd/Even. They are IC508/3 1Clk and IC508/12 2D. Each of these inputs is for one Overview of the two D flip-flops inside IC508. -
Page 97: Vdsp
VDSP The DSP consists of an ALU, multiplier, RAM and ROM. It uses the count information it receives from the CDP and its own internal program to gen- Overview erate the vertical deflection sawtooth, the Pin or parabolic signal and the AFC compensation signal. -
Page 99: Out
V Protect V Out The voltage boost pulse from IC5004/3 is applied to a peak detect circuit consisting of C5034, D5010, R5040 and C5023. As long as these pulses Overview are present, they cause C5023 to hold a charge. This charge causes .6 volts to be present at Q5005/B. -
Page 101: High Voltage Block
There are also two HV Stop circuits, one that monitors the +12, +135 and High Voltage Block the tap from the High Voltage Block, and another that monitors a tap from the FBT and the ABL signal. Both of these circuits mute the H Drive circuit and alert IC1009 OSD Processor of a failure. -
Page 103: Hv Drive
HV Drive Overview The HV drive circuit amplifies the H Drive signal and applies it to the HV Output. It also uses the signal from the HV Regulation circuit to control Q8003/B Q8003/C the peak drive to the HV Output. 2V 20us 20V 20us HV Drive... - Page 105 High Voltage Regulation HV Out The High Voltage is regulated using a signal developed by the HV Regu- lation PWM signal discussed later. This signal is applied to Q8008/G. Overview This input waveform causes current to flow through Q8008. This is used to control the width of the pedestal at the bottom of the Q8007/C wave- The High Voltage Out circuit uses the H Drive signal to produce the heater, form showed below.
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Page 107: Hv Regulation Control
The voltages at IC8007/9 and 10 are used to determine the High Voltage. HV Regulation Control They should be nearly identical in value when the circuit is acting nor- mally. This portion of IC8007 and its associated components are used as a filter and gain control circuit. -
Page 109: Hv Regulation Pwm
HV Regulation PWM IC8002 PWM creates a PWM signal by comparing the sawtooth signal with the output from the HV Regulator Control circuit whose output comes Overview from IC8007/1. When the Sawtooth signal input at IC8007/6 is greater than the input at IC8002/5, it will cause IC8002/7 to output a LOW. When The purpose of the HV Regulation PWM is to create a sawtooth wave- the sawtooth is less than the regulator input, IC8002/7 will output a HIGH. -
Page 111: Hv Stop 2
occurred. This causes the Timer LED to flash seven times in accordance HV Stop 2 with the self-diagnostics. When Q8021 is turned ON, it shuts down the H Drive connected to the HV Drive circuit. This shuts down the High Volt- age. -
Page 113: Hv Stop 1
High Voltage Block Tap HV Stop 1 IC8008/3 receives input IC8007/1 which is the buffer for the High Voltage Block tap. It has the same voltage as the tap. This voltage is compared Overview to a reference of 9.3 volts input at IC8007/2 and produces an output of – 12 volts at IC8008/1. -
Page 115: Convergence Block
This is ceived by a number of sensors located around the outside of the screen. done in the RA-4 chassis using Sony’s new digital convergence circuit. These sensors output a current proportional to the amount of light re- To accomplish this, this circuit uses what is called the PJED (Projection ceived. -
Page 117: Sensor Amp
When Auto Focus button is pressed Pattern A and B are output in suc- Sensor Amp cession over top of the sensors. Pattern A is offset to the left of the sensor and Pattern B is output to the right of the sensor. Overview [ OVER VIEW ] The sensor amplifier is used when the customer or servicer presses the... - Page 118 Varying the input to the convergence amplifiers changes the pattern. The main table below shows that the A and B patterns are output while the conver- Flag clear gence data is changed. The changing of this data changes the conver- AD timing, Pattern display Initial settings gence amplifiers input.
- Page 119 The flowchart on the previous page shows the sequence of operations for The flowchart below left shows the steps taken during the adjustment the Auto Focus operation. The first operation is to set the initial settings. portion of the previous flowchart. As these adjustments are performed, Then the H size is changed.
- Page 120 The following table shows the errors that may occur. You should note here that if the green tube is replaced it is very important that the green yoke be placed so there is no tilt. If it is not placed correctly, a repetitive “80” can occur. [ERROR CODE LIST] ERROR DISCRIPTION...
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Page 121: Circuit Description
Circuit Description 0 : UPPER SENSOR 1 : LEFT SENSOR The sensor amplifier is responsible for taking the amount of light received 2 : RIGHT SENSOR by the sensors and outputting a DC value to the PJED CPU to represent 3 : LOWER SENSOR the amount of light received. -
Page 123: Bd Input
Fine Adjustments The rough adjustments are just like some of the adjustments used in the previous Sony projection sets. It uses the major adjustments in the old Once you have gotten the best picture you can by using the rough mode, system. -
Page 125: Bd Output
The Green Vertical Output is input to IC714/14 RSI and IC720/14 RSI. BD Output The analog signals are output from pin 6 of each of these ICs. They are combined and input to IC1708/2. IC1708 is a filter amplifier which outputs the GV signal to CN523 on the A board. -
Page 127: Convergence Out
Convergence Out Convergence Amp IC5005 Convergence Amp contains three amplifiers. Each of these am- plifiers contains two inputs, a Non-inverting and Inverting, and one out- Overview put. If we look at the first amplifier inside IC5005 we see that the vertical The Convergence Out circuit amplifies the horizontal and vertical conver- green signal is input to IC5005/4 Non-inverting Input. -
Page 129: Service Mode
PJED Mode Service Mode If the 5 button is pressed after the unit enters the test mode, you will notice that the letters indicating the service adjustments have changed Overview from green to white and the following will appear on the screen: The normal service mode has not changed greatly. - Page 130 • ADJUST BUTTONS AND INDICATOR MUTING POWER MUTING SYSTEM DVD/ CABLE TV POWER ON FUNCTION DVD/VTR DBS/CABLE FREEZE AUDIO SWAP POTITION ZOOM IN LEFT RIGHT TV/DBS GUIDE ACTIVE PICTURE MODE Category up DISPLAY DISPLAY TV/VIDEO Data up (Change Color) Adjustment item Data down (Test Pattern) Adjustment item...
- Page 131 Moving the joystick changes data. Moving the joystick up or down There are two sets of adjustments for convergence, coarse and fine. The changes the V data, and moving the data left or right will change the H coarse adjustments are similar to older convergence systems. The fine data.
- Page 132 PJED mode. A djust the center marker to the horizontal center of the each point until your green picture is correct. Repeat this procedure for picture (Between the O and the N in the SONY log). However, the data red and blue and lay those pictures over green.
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Page 135: Protection Block
The number of times the LED blinks may correspond to that shown in the Protection Block following table: Diagnosis item Standb y/ Self-diagnosis Overview sleep lamp, screen displa y , The RA-4 chassis employs a Self-Diagnostic system that uses the Timer Number of b links Diagnosis item: Results LED and an on screen menu to help indicate where the problem with the... -
Page 137: Circuit Description
This display can be cleared by pressing 8 and Enter in this mode. In addition to sending a signal to the OSD processor, all of these protect lines are connected to the power supply latch on the G board, except for There may be situations when the diagnostic system will not work. - Page 139 SEL Service Company A Division of Sony Electronics Inc. 1 Sony Drive Park Ridge, New Jersey 07656 TVP080199 Printed in U.S.A.