NEC mPD703129 Manuals

Manuals and User Guides for NEC mPD703129. We have 1 NEC mPD703129 manual available for free PDF download: Preliminary User's Manual

NEC mPD703129 Preliminary User's Manual (612 pages)

32-/16-bit Romless Microcontroller

Brand: NEC | Category: Microcontrollers | Size: 7.81 MB

Preface
5
Table of Contents
7
Chapter 1 Introduction

23
- General
  
  23
- Device Features
  
  24
- Application Fields
  
  26
- Ordering Information
  
  26
- Pin Configuration (Top View)
  
  27
  - Figure 1-1: V850E/CA2 Jupiter Pin Configuration
    27
- Function Block Diagram
  
  29
  - Figure 1-2: V850E/CA2 Jupiter Block Diagram
    29
    
    On-Chip Units
    30
Chapter 2 Pin Functions

33
Chapter 3 CPU Function

55
Chapter 4 Bus Control Function

109
- Features
  
  109
- Bus Control Pins
  
  109
- Memory Block Function
  
  110
  - Figure 4-1: Memory Block Function
    110
    
    Chip Select Control Function
    111
    
    Figure 4-2: Chip Area Select Control Registers 0, 1 (1/2)
    111
- Programmable Peripheral I/O Registers
  
  113
  - Figure 4-3: Programmable Peripheral I/O Register (Outline)
    113
  - Figure 4-4: Peripheral Area Selection Control Register (BPC)
    114
- Bus Cycle Type Control Function
  
  115
  - Bus Cycle Type Configuration
    115
- Bus Access
  
  116
- Cache Configuration
  
  118
  - Bus Width
    119
- Wait Function
  
  131
- Idle State Insertion Function
  
  134
- Bus Priority Order
  
  135
  - Table 4-2: Bus Priority Order
    135
- Boundary Operation Conditions
  
  136
  - Program Space
    136
  - Data Space
    136
Chapter 5 Memory Access Control Function

137
- SRAM, External ROM, External I/O Interface
  
  137
- Page ROM Controller (ROMC)
  
  145
  - Features
    145
  - Page ROM Connections
    146
  - Figure 5-3: Example of Page ROM Connections
    146
  - On-Page/Off
    147
  - Figure 5-4: On-Page/Off-Page Judgment During Page ROM Connection (1/2)
    147
  - Page ROM Configuration Register (PRC)
    149
  - Figure 5-5: Page ROM Configuration Register (PRC)
    149
  - Page ROM Access
    150
  - Figure 5-6: Page ROM Access Timing (1/4)
    150
Chapter 6 Instruction Cache

155
Chapter 7 DMA Functions (DMA Controller)

169
Chapter 8 Interrupt/Exception Processing Function

199
Chapter 9 Clock Generator

239
Chapter 10 Timer

271
Chapter 11 Watch Timer

349
Chapter 12 Watchdog Timer Function

357
- Functions
  
  357
  - Figure 12-1: Block Diagram of Watchdog Timer
    357
- Configuration
  
  358
  - Table 12-1: Watchdog Timer Configuration
    358
- Watchdog Timer Control Register
  
  359
- Operation
  
  362
  - Operating as Watchdog Timer
    362
Chapter 13 Serial Interface Function

363
Chapter 14 FCAN Interface Function

427
Chapter 15 A/D Converter

523
Chapter 16 Port Functions

545
- Features
  
  545
- Port Configuration
  
  546
  - Figure 16-1: Port Configuration
    546
  - Table 16-1: Functions of each Port
    547
  - Table 16-2: Port Pin Functions
    548
  - Figure 16-2: Type a Block Diagram
    551
  - Figure 16-3: Type B Block Diagram
    552
  - Figure 16-4: Type C Block Diagram
    553
  - Figure 16-5: Type D Block Diagram
    554
  - Figure 16-6: Type E Block Diagram
    555
- Pin Functions of each Port
  
  556
  - Port 1
    556
  - Figure 16-7: Port 1 (P1)
    556
  - Figure 16-8: Port 1 Mode Register (PM1)
    557
  - Figure 16-9: Port 1 Mode Control Register (PMC1)
    558
  - Port 2
    559
  - Figure 16-10: Port 2 (P2)
    559
  - Figure 16-11: Port 2 Mode Register (PM2)
    560
  - Figure 16-12: Port 2 Mode Control Register (PMC2)
    561
  - Port 3
    562
  - Figure 16-13: Port 3 (P3)
    562
  - Figure 16-14: Port 3 Mode Register (PM3)
    563
  - Figure 16-15: Port 3 Mode Control Register (PMC3)
    563
  - Port 4
    564
  - Figure 16-16: Port 4 (P4)
    564
  - Figure 16-17: Port 4 Mode Register (PM4)
    565
  - Figure 16-18: Port 4 Mode Control Register (PMC4)
    565
  - Port 5
    566
  - Figure 16-19: Port 5 (P5)
    566
  - Figure 16-20: Port 5 Mode Register (PM5)
    567
  - Figure 16-21: Port 5 Mode Control Register (PMC5)
    568
  - Port 6
    569
  - Figure 16-22: Port 6 (P6)
    569
  - Figure 16-23: Port 6 Mode Register (PM6)
    570
  - Figure 16-24: Port 6 Mode Control Register (PMC6)
    571
  - Port 7
    572
  - Figure 16-25: Port Function Register 7 (P7)
    572
  - Port 7/8
    573
  - Figure 16-26: Port Function Register 7/8 (P7/P8)
    573
  - Port 9
    574
  - Figure 16-27: Port 9 (P9)
    574
  - Figure 16-28: Port 9 Mode Register (PM9)
    574
  - 10Port AH
    575
  - Figure 16-29: Port AH (PAH)
    575
  - Figure 16-30: Port AH Mode Register (PMAH)
    576
  - Figure 16-31: Port AH Mode Control Register (PMCAH)
    576
  - 11Port CS
    577
  - Figure 16-32: Port CS (PCS)
    577
  - Figure 16-33: Port CS Mode Register (PMCS)
    578
  - Figure 16-34: Port CS Mode Control Register (PMCCS)
    578
  - 12Port CT
    579
  - Figure 16-35: Port CT (PCT)
    579
  - Figure 16-36: Port CT Mode Register (PMCT)
    580
  - Figure 16-37: Port CT Mode Control Register (PMCCT)
    580
  - 13Port CM
    581
  - Figure 16-38: Port CM (PCM)
    581
  - Figure 16-39: Port CM Mode Register (PMCM)
    582
  - Figure 16-40: Port CM Mode Control Register (PMCCM)
    582
Chapter 17 RESET

583
- Reset Overview
  
  583
- Features
  
  583
- Pin Functions
  
  583
  - Table 17-1: Operation Status of each Pin During Reset Period
    584
- Reset by RESET Pin
  
  585
  - Figure 17-1: Reset Signal Acknowledgment
    585
  - Figure 17-2: Reset at Power-On
    586
- Reset by Watchdog Timer
  
  587
- Reset Output
  
  587
- Initialization
  
  588
  - Table 17-2: Initial Values of CPU and Internal RAM after Reset
    588
Appendix A List of Instruction Sets

589
- Figure A-1: How to Read Instruction Set List
  589
Appendix B Index

601

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NEC mPD703129 Manuals

NEC mPD703129 Preliminary User's Manual (612 pages)

Table of Contents

Chapter 1 Introduction

General

Device Features

Application Fields

Ordering Information

Pin Configuration (Top View)

Function Block Diagram

Chapter 2 Pin Functions

List of Pin Functions

Description of Pin Functions

Types of Pin I/O Circuit and Connection of Unused Pins

Chapter 3 CPU Function

Features

CPU Register Set

Operation Modes

Address Space

Memory Map

Specific Registers

Chapter 4 Bus Control Function

Features

Bus Control Pins

Memory Block Function

Programmable Peripheral I/O Registers

Bus Cycle Type Control Function

Bus Access

Cache Configuration

Wait Function

Idle State Insertion Function

Bus Priority Order

Boundary Operation Conditions

Chapter 5 Memory Access Control Function

SRAM, External ROM, External I/O Interface

Page ROM Controller (ROMC)

Chapter 6 Instruction Cache

Features

Configuration

Control Registers

Instruction Cache Operation

Instruction Cache Initialisation

Operating Precautions

Chapter 7 DMA Functions (DMA Controller)

Features

Control Registers

Next Address Setting Function

DMA Bus States

Transfer Mode

Transfer Types

Transfer Object

DMA Channel Priorities

DMA Transfer Start Factors

Forcible Interruption

Forcible Termination

DMA Transfer Completion

Precautions

Chapter 8 Interrupt/Exception Processing Function

Features

Non-Maskable Interrupts

Maskable Interrupts

Noise Elimination Circuit

Software Exception

Exception Trap

Multiple Interrupt Processing Control

Interrupt Response Time

Periods in Which Interrupts Are Not Acknowledged

Chapter 9 Clock Generator

Features

Configuration

Control Registers

Power Saving Functions

Register Description

Chapter 10 Timer

Timer C

Timer D

Timer G

Chapter 11 Watch Timer

Function

Configuration