NEC V850ES/FG3-L Manuals

Manuals and User Guides for NEC V850ES/FG3-L. We have 1 NEC V850ES/FG3-L manual available for free PDF download: User Manual

NEC V850ES/FG3-L User Manual (764 pages)

32-bit Single-Chip Microcontroller

Brand: NEC | Category: Microcontrollers | Size: 7.65 MB

Table of Contents
9
Chapter 1 Introduction

19
General

19
Features Summary

20
Description

23
- Internal Units
  25
- Structure of the Manual
  25
Ordering Information

27
Chapter 2 Pin Functions

31
Overview

31
- Description
  32
- Terms
  35
- Noise Elimination
  35
Port Group Configuration Registers

36
- Overview
  36
- Pin Function Configuration
  37
- Pin Data Input/Output
  43
- Configuration of Pull-Up Resistors
  45
- Open Drain Configuration
  46
Port Buffers Diagrams

47
Port Type Diagrams

51
- Port Type C
  51
- Port Type C-U
  52
- Port Type D0
  53
- Port Type D0-U
  54
- Port Type D1
  55
- Port Type D1-U
  56
- Port Type D1-UI
  57
- Port Type D3-UI
  58
- Port Type D1A
  59
- Port Type D1O1-UI
  60
- Port Type D2
  61
- Port Type E01-U
  62
- Port Type E10-U
  63
- Port Type E10-UI
  64
- Port Type E11-U
  65
- Port Type E11-UI
  66
- Port Type E21-U
  67
- Port Type Ex0-U
  68
- Port Type Ex1-U
  69
- Port Type Ex1-UI
  70
- Port Type Ex2-U
  71
- Port Type F010X-U
  72
- Port Type F010X-UI
  73
- Port Type F100X-U
  74
- Port Type F1010-U
  75
- Port Type F101X-U
  76
- Port Type F1100O0-U
  77
- Port Type F1100O1-U
  78
- Port Type F1100-U
  79
- Port Type F1110-UI
  80
- Port Type F113X-UI
  81
- Port Type F1X10-UI
  82
- Port Type F3X1X-UI
  83
- Port Type F1Xx0O1-U
  84
- Port Type Fx010-U
  85
- Port Type Fx01X-U
  86
- Port Type Fx103-UI
  87
- Port Type Fx10X-U
  88
- Port Type Fx10X-UI
  89
- Port Type Fx110-U
  90
- Port Type Fx120-UFI
  91
- Port Type Fx123-UFI
  92
- Port Type Fx12X-UFI
  93
- Port Type Fx13X-U
  94
- Port Type Fx210-U
  95
- Port Type Fx2X0-U
  96
- Port Type Fxx10-U
  97
- Port Type Fxx1X-U
  98
- Port Type Fxx2X-U
  99
Port Group Configuration

100
- Port Group Configuration Lists
  100
- Alphabetic Pin Function List
  104
- Port Group 0
  108
- Port Group 1 (V850ES/FG3-L)
  110
- Port Group 3
  111
- Port Group 4
  113
- Port Group 5
  114
- Port Group 7
  116
- Port Group 9
  118
- Port Group CM
  122
- Port Group CS (V850ES/FF3-L, V850ES/FG3-L)
  123
- Port Group CT (V850ES/FF3-L, V850ES/FG3-L)
  124
- Port Group DL
  125
Noise Elimination

126
- Analog Filtered Inputs
  126
- Digitally Filtered Inputs
  127
Pin Functions in Reset and Power Save Modes

130
Recommended Connection of Unused Pins

131
Package Pins Assignment

132
Chapter 3 CPU System Functions

135
Overview

135
- Description
  136
CPU Register Set

137
- General Purpose Registers (R0 to R31)
  138
- System Register Set
  139
Operation Modes

146
- Normal Operation Mode
  146
- Flash Programming Mode (Flash Memory Devices Only)
  146
- On-Chip Debug Mode
  146
Address Space

147
- CPU Address Space and Physical Address Space
  147
- Program and Data Space
  149
Memory

151
- Memory Areas
  151
- Recommended Use of Data Address Space
  154
Write Protected Registers

155
- Write Protection Control Registers
  157
Chapter 4 Clock Generator

159
Overview

159
- Description
  160
- Clock Monitor
  163
- Power Save Modes Overview
  164
- Start Conditions
  165
Clock Generator Registers

166
- General Clock Generator Registers
  168
- PLL Control Registers
  178
- Stand-By Control Registers
  181
- Prescaler3 Control Registers
  183
- Clock Monitor Control Registers
  184
- Selector Control Registers
  185
Option Bytes

188
- Option Byte 0000 007A H
  189
- Option Byte 0000 007B H
  190
Clock Generator Operation

191
- Overview of Clock Operation Control Settings
  191
- Operation State Transitions
  192
- Power Save Modes Description
  196
- Available Clocks in Power Save Modes
  211
- Power Save Mode Activation
  213
- Controlling the PLL
  215
- Watch Dog Timer Clock
  215
- CLKOUT Function
  215
- Operation of Prescaler3
  216
- Operation of the Clock Monitor
  217
Chapter 5 Interrupt Controller (INTC)

221
Features

221
Non-Maskable Interrupts

224
- Operation
  227
- Restore
  228
- Non-Maskable Interrupt Status Flag (NP)
  229
- NMI Control
  229
Maskable Interrupts

230
- Operation
  230
- Restore
  232
- Priorities of Maskable Interrupts
  233
- Xxicn - Maskable Interrupt Control Registers
  237
- Imrm - Interrupt Mask Registers
  240
- ISPR - In-Service Priority Register
  242
- Maskable Interrupt Status Flag (ID)
  243
- External Maskable Interrupts
  243
External Interrupts Edge Detection Configuration

244
Software Exception

247
- Operation
  247
- Restore
  248
- Exception Status Flag (EP)
  249
Exception Trap

249
- Illegal Opcode Definition
  249
- Debug Trap
  251
Multiple Interrupt Processing Control

252
Interrupt Response Time

254
Periods in Which Interrupts Are Not Acknowledged

255
Chapter 6 Key Interrupt Function

257
Function

257
Control Register

258
Cautions

258
Chapter 7 Flash Memory

259
Code Flash Memory Overview

260
- Code Flash Memory Features
  260
- Code Flash Memory Mapping
  261
- Code Flash Memory Functional Outline
  262
- Code Flash Memory Erasure and Rewrite
  265
Flash Programming with Flash Programmer

266
- Programming Environment
  266
- Communication Mode
  267
- Pin Connection with Flash Programmer PG-FP4
  269
- Flash Memory Programming Control
  271
Code Flash Self-Programming

277
Variable Reset Vector

284
Flash Mask Options

285
- PRDSELH Register - Product Selection Code Register High
  288
Chapter 8 Data Protection and Security

289
Overview

289
N-Wire Debug Interface Protection

289
Flash Programmer and Self-Programming Protection

291
Chapter 9 Bus Control Unit (BCU)

295
Description

295
- Peripheral I/O Area
  296
- NPB Access Timing
  298
- Bus Properties
  299
- Boundary Operation Conditions
  299
Registers

301
- BCU Registers
  301
Chapter 10 16-Bit Timer/Event Counter AA

305
Features

305
Function Outline

306
Configuration

306
Input Selection Registers

312
Control Registers

314
Operation

326
Chapter 11 16-Bit Interval Timer M

371
Features

371
Configuration

371
Timer M Registers

372
Operation

374
- Interval Timer Mode
  374
- Cautions
  375
Chapter 12 Timer AA Synchroneous Operation

377
Chapter 13 Watch Timer Functions

379
Functions

379
Configuration

380
Control Registers

381
Operation

382
- Operation as Watch Timer
  382
- Operation as Interval Timer
  383
- Cautions
  384
Chapter 14 Watchdog Timer 2

385
Functions

385
Configuration

386
Control Registers

387
Watchdog Timer Operation

389
Watchdog Timer Operation in Power Save Mode

390
Chapter 15 Asynchronous Serial Interface (UARTD)

391
Features

391
Configuration

392
UARTD Registers

395
Interrupt Request Signals

403
Operation

404
- Data Format
  404
- SBF Transmission/Reception Format
  406
- SBF Transmission
  408
- SBF Reception
  408
- Data Consistency Check
  410
- UART Transmission
  412
- Continuous Transmission Procedure
  413
- UART Reception
  414
- Reception Errors
  416
- Parity Types and Operations
  416
- Receive Data Noise Filter
  418
Baud Rate Generator

419
Cautions

426
Chapter 16 Clocked Serial Interface (CSIB)

427
Features

427
Configuration

428
CSIB Control Registers

430
Operation

436
Output Pins

448
Operation Flow

449
Chapter 17 I C Bus (IIC)

457
Features

457
C Pin Configuration

457
Configuration

458
IIC Registers

462
C Bus Mode Functions

480
- Pin Functions
  480
C Bus Definitions and Control Methods

481
- Start Condition
  481
- Addresses
  482
- Transfer Direction Specification
  483
- Acknowledge Signal (ACK)
  483
- Stop Condition
  485
- Wait Signal (WAIT)
  486
C Interrupt Request Signals (Intiicn)

488
Interrupt Request Signal (Intiicn)

506
Address Match Detection Method

507
Error Detection

507
Extension Code

508
Arbitration

509
Wakeup Function

510
Cautions

511
Communication Operations

512
- Master Operation 1
  512
- Master Operation 2
  514
- Slave Operation
  515
Timing of Data Communication

519
Chapter 18 CAN Controller (CAN)

527
Features

528
- Overview of Functions
  529
- Configuration
  530
CAN Protocol

531
- Frame Format
  531
- Frame Types
  532
- Data Frame and Remote Frame
  532
- Error Frame
  539
- Overload Frame
  540
Functions

541
- Determining Bus Priority
  541
- Bit Stuffing
  541
- Multi Masters
  542
- Multi Cast
  542
- CAN Sleep Mode/Can Stop Mode Function
  542
- Error Control Function
  542
- Baud Rate Control Function
  549
Connection with Target System

552
Internal Registers of CAN Controller

553
- CAN Module Register and Message Buffer Addresses
  553
- CAN Controller Configuration
  554
- CAN Registers Overview
  555
- Register Bit Configuration
  557
Bit Set/Clear Function

560
Control Registers

562
CAN Controller Initialization

598
Message Reception

602
- Receive Data Read
  603
- Receive History List Function
  604
- Mask Function
  606
- Multi Buffer Receive Block Function
  608
- Remote Frame Reception
  609
Message Transmission

610
- Transmit History List Function
  612
- Automatic Block Transmission (ABT)
  614
- Transmission Abort Process
  616
- Remote Frame Transmission
  617
Power Saving Modes

618
- CAN Sleep Mode
  618
- CAN Stop Mode
  621
- Example of Using Power Saving Modes
  622
Interrupt Function

623
Diagnosis Functions and Special Operational Modes

624
- Receive-Only Mode
  624
- Single-Shot Mode
  625
- Self-Test Mode
  626
- Receive/Transmit Operation in each Operation Mode
  627
Time Stamp Function

628
Baud Rate Settings

629
- Baud Rate Setting Conditions
  629
- Representative Examples of Baud Rate Settings
  633
Operation of CAN Controller

637
Chapter 19 A/D Converter (ADC)

663
Functions

663
Configuration

665
ADC Registers

667
Operation

680
- Basic Operation
  680
- Trigger Mode
  681
- Operation Modes
  683
- Power-Fail Compare Mode
  688
Cautions

694
How to Read A/D Converter Characteristics Table

696
Chapter 20 Power Supply Scheme

701
Overview

701
Description

702
Voltage Regulators

703
Chapter 21 Reset

705
Overview

705
- General Reset Performance
  705
- Reset at Power-On
  708
- External RESET
  710
- Reset by Watchdog Timer 2
  711
- Reset by Clock Monitor
  711
- Reset by Low-Voltage Detector
  711
Reset Registers

712
Chapter 22 Low-Voltage Detector

713
Functions

713
Configuration

713
Registers

714
Operation

719
Chapter 23 On-Chip Debug Unit

723
Functional Outline

723
- Debug Functions
  723
Controlling the N-Wire Interface

726
N-Wire Enabling Methods

728
Connection to N-Wire Emulator

730
- KEL Connector
  730
Restrictions and Cautions on On-Chip Debug Function

734
Chapter 24 Differences Fx3-L to Fx3

735
Appendix A Special Function Registers

737
CAN Registers

737
Other Special Function Registers

739
Appendix B Registers Access Times

749
Timer AA

749
Timer M

751
Watchdog Timer 2

752
A/D Converter

752
I2C Bus

753
Asynchronous Serial Interface (UARTD)

753
Clocked Serial Interface (CSIB)

753
CAN Controller

754
All Other Registers

754
Revision History

755
Index

757

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NEC V850ES/FG3-L Manuals

NEC V850ES/FG3-L User Manual (764 pages)

Table of Contents

Chapter 1 Introduction

General

Features Summary

Description

Ordering Information

Chapter 2 Pin Functions

Overview

Port Group Configuration Registers

Port Buffers Diagrams

Port Type Diagrams

Port Group Configuration

Noise Elimination

Pin Functions in Reset and Power Save Modes

Recommended Connection of Unused Pins

Package Pins Assignment

Chapter 3 CPU System Functions

Overview

CPU Register Set

Operation Modes

Address Space

Memory

Write Protected Registers

Chapter 4 Clock Generator

Overview

Clock Generator Registers

Option Bytes

Clock Generator Operation

Chapter 5 Interrupt Controller (INTC)

Features

Non-Maskable Interrupts

Maskable Interrupts

External Interrupts Edge Detection Configuration

Software Exception

Exception Trap

Multiple Interrupt Processing Control

Interrupt Response Time

Periods in Which Interrupts Are Not Acknowledged

Chapter 6 Key Interrupt Function

Function

Control Register

Cautions

Chapter 7 Flash Memory

Code Flash Memory Overview

Flash Programming with Flash Programmer

Code Flash Self-Programming

Variable Reset Vector

Flash Mask Options

Chapter 8 Data Protection and Security

Overview

N-Wire Debug Interface Protection

Flash Programmer and Self-Programming Protection

Chapter 9 Bus Control Unit (BCU)

Description

Registers

Chapter 10 16-Bit Timer/Event Counter AA

Features

Function Outline

Configuration

Input Selection Registers

Control Registers

Operation

Chapter 11 16-Bit Interval Timer M

Features

Configuration

Timer M Registers

Operation

Chapter 12 Timer AA Synchroneous Operation

Chapter 13 Watch Timer Functions

Functions

Configuration

Control Registers

Operation

Chapter 14 Watchdog Timer 2

Functions

Configuration

Control Registers

Watchdog Timer Operation