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3 7 63 1515 0
Pin No.
Pin Name
BA41
BA43
BB2
BB4
BB6
BB8
XTAL25MI
BB10
BB12
BB14
BB16
A_RDQS0B
BB18
BB20
A_RDQ10
BB22
BB24
A_RRASB
BB26
BB28
BB30
BB32
A_RDQ17
BB34
BB36
A_RDQ31
BB38
BB40
A_TP_MEMPLL
BB42
BC1
BC3
BC5
BC7
AVDD33_XTAL25M
TE
L 13942296513
BC9
BC11
BC13
BC15
BC17
A_RDQS1
BC19
A_RDQ13
BC21
A_RCLK0
BC23
BC25
BC27
BC29
A_RWEB
BC31
A_RDQ19
BC33
A_RDQS2B
BC35
A_RDQS3
BC37
A_RDQ29
BC39
A_RCLK1B
BC41
A_TN_MEMPLL
BC43
A_REXTDN
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I/O
DVSS
-
Ground terminal
VCC2IO
-
Power supply terminal (+1.8V)
SRXN_1
I
SATA channel 1 RX differential pair signal (negative) input terminal
SRXN_2
I
SATA channel 2 RX differential pair signal (negative) input terminal
SVCTST
-
Not used
I
System clock signal input terminal (25 MHz)
TDO
-
Not used
TDI
-
Not used
VCC2IO
-
Power supply terminal (+1.8V)
O
Data strobe signal (negative) output to the SD-RAM
VCC2IO
-
Power supply terminal (+1.8V)
I/O
Two-way data bus with the SD-RAM
VCC2IO
-
Power supply terminal (+1.8V)
O
Row address strobe signal output to the SD-RAM
VCC2IO
-
Power supply terminal (+1.8V)
A_RBA0
O
Bank address signal output to the SD-RAM
VCC2IO
-
Power supply terminal (+1.8V)
I/O
Two-way data bus with the SD-RAM
VCC2IO
-
Power supply terminal (+1.8V)
I/O
Two-way data bus with the SD-RAM
VCC2IO
-
Power supply terminal (+1.8V)
-
Not used
VCC2IO
-
Power supply terminal (+1.8V)
SRXP_1
I
SATA channel 1 RX differential pair signal (positive) input terminal
STXP_1
O
SATA channel 1 TX differential pair signal (positive) output terminal
STXP_2
O
SATA channel 2 TX differential pair signal (positive) output terminal
-
Power supply terminal (+3.3V)
GPIO7
-
Not used
TMS
-
Not used
A_RDQ2
I/O
Two-way data bus with the SD-RAM
A_RDQ7
I/O
Two-way data bus with the SD-RAM
O
Data strobe signal (positive) output to the SD-RAM
I/O
Two-way data bus with the SD-RAM
O
Clock signal (positive) output to the SD-RAM
A_RA0
O
Address signal output to the SD-RAM
A_RA6
O
Address signal output to the SD-RAM
A_RA3
O
Address signal output to the SD-RAM
O
Write enable signal output to the SD-RAM
I/O
Two-way data bus with the SD-RAM
O
Data strobe signal (negative) output to the SD-RAM
O
Data strobe signal (positive) output to the SD-RAM
I/O
Two-way data bus with the SD-RAM
O
Clock signal (negative) output to the SD-RAM
-
Not used
-
Not used
x
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y
i
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8
Q Q
3
6 7
1 3
u163
.
HBD-E370/E470/E570/E870/T57
2 9
9 4
2 8
Description
Not used
Not used
1 5
0 5
8
2 9
9 4
m
co
9 9
2 8
9 9
87
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