Sony SDP-EP70 Service Manual page 46

• IC424 Digital Signal Processor (DSP56009FJ88F)
Pin No. Pin Name
1 AGND
MCS0
2
MCS3/MA15
3
4 MA14
MA13
5
6 AVCC
7 MA12
8 AGND
QVCC
9
QGND
10
11
MA11
MA10
12
MA9
13
14 MA8
15 AGND
16 MA7
AVCC
17
18 MA6
MA5
19
MA4
20
21 AGND
22 MA3
MA2
23
MA1
24
25 MA0
SCK/SCL
26
EXTAL
27
QVCC
28
29 QGND
PINIT
30
PGND
31
32 PCAP
33 PVCC
SGND
34
MISO/SDA
35
36 RESET
MODA/IRQA
37
MODB/IRQB
38
MODC/NMI
39
40 SVCC
I/O
– Address buffer ground
O
Chip select 0 output to S-RAM (Not used)
O Chip select 3 output to S-RAM (Not used)
O
Address data output to S-RAM (Not used)
O
– Address bus buffer power supply (+5V)
O
Address data output to S-RAM(Not used)
Ground for address bus buffer
–
–
Power supply for internal logic (+5V)
–
Ground for internal logic
O
O
Address data output to S-RAM (Not used)
O
O
– Ground for address bus buffer
O Address data output to S-RAM (Not used)
–
Power supply for address bus buffer (+5V)
O
O Address data output to S-RAM (Not used)
O
– Ground for address bus buffer
O
O
Address data output to S-RAM (Not used)
O
O
I SPI serial clock signal input from system controller
I
External frequency input
– Power supply for internal logic (+5V)
– Ground for internal logic
I PLL initialize input (Fixed at "L")
–
Ground for PLL
I
PLL filter input (Connected to 0.01 µF capacitor)
Power supply for PLL (+5V)
–
–
Ground for serial port
I
Master data signal input from system controller
I Reset signal input from system controller
I Mode select A (Fixed at "H")
I Mode select B (Fixed at "L")
I
Mode select C (Fixed at "H")
– Power supply for serial port (+5V)
– 61 –
Function