Ic Block Diagrams - Sony SDP-EP70 Service Manual

Digital surround processor
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4-17. IC BLOCK DIAGRAMS

• Main section
IC202 AT24C02N-10SC
1
DATA REGISTER
CK
NC
8
YDEC
2
2
NC
32
2
NC
3
E
PROM
32
XDEC
61x61
V
4
SS
H. V. GENERATION
TIMING & CONTR OL
START CYCLE
IC301 LC8905VD
1
DIN1
DIN2
2
INPUT
DEMODULATION
3
E/DOUT
4
VDD
PLL
5
R
VIN
6
7
VCO
GND
8
TIMING
CKSEL
9
XMODE
10
AVOCK
11
TEST1
12
TEST
IC302 TC74HC153AF
DATA INPUTS
STROBE
A
V
2G
SELECT
2C3
2C2
CC
16
15
14
13
12
2C3
2C2
2G
1G
1C3
1C2
1C1
1
2
3
4
STROBE
B
1C3
1C2
1C1
1G
SELECT
DATA INPUTS
DREF
ACK
PIN
R/W
5
WOR O
ADDRESS
COUNTER
LOAD
INC
CONTROL
LOGIC
START
STOP
LOGIC
LOCK ERROR
DATA
DET
MUTE
OUTPUT
3
3
C BIT
SUB-Q
DET
DET
MICOM
INTERFACE
OUTPUT
2C1
2C0
2Y
11
10
9
2C1
2C0
2Y
B
B
A
A
B
B
A
A
1C0
1Y
5
6
7
8
1C0 OUTPUT
GND
1Y
8
8
V
CC
7
TEST INPUT
6
SCL
5
SDA
24
ERROR
23
DATAOUT
22
LRCK
21
BCK
FSI28
20
19
CKOUT
18
DQSY/LD
17
SRDT/DO
16
SWDT/DI
15
XLAT/CE
14
SCLK/CL
13
TEST2
– 72 –

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