LG CED-8081B Service Manual page 54

Pin No. Pin Name
123 UA7
124 UA6
125 UA5
126 UA4
127 UA3
128 UA2
129 UA1
130 UA0
115 UA15
116 UA14
117 UA13
118 UA12
119 UA11
120 UA10
121 UA9
122 UA8
114 UALE
94 CPUTYPE
Buffer Memory Interface
Pin No. Pin Name
39 RAD11
40 RAD10
41 RAD9
42 RAD8
43 RAD7
44 RDA6
45 RAD5
48 RAD4
49 RAD3
50 RAD2
51 RAD1
52 RAD0
20 RD15
21 RD14
24 RD13
25 RD12
26 RD11
27 RD10
28 RD9
29 RD8
14 RD7
15 RD6
40
Type
I Address : Use these pins if the microcontroller has a separate address and data bus.
L
I Address : Use these pins when accessing 64 KB buffer memory window.
L
I Address Latch Enable : Use this pin if the microcontroller has multiplexed addess and data bus.
S
CPU Type Select : Microcontroller type (86 type/68type) select
I VCC = Intel
S
GND = Motorola
Type
O RAM Addess : Addess for DRAM
These pins are multiplxed address output
I/O RAM Data : Data for DRAM
PUA
Possible to set bus size (16 bit/8bit) by setting internal registers
Description
Description