Pioneer VSX-321-K-P Service Manual page 26

1
A • Pin Function
Audio Outputs
Name
MCLK
IIS_SCK
IIS_WS
IIS_SD0
IIS_SD1
IIS_SD2
IIS_SD3
B
SPDIF
DSD3R
DSD3L
A_MUTE
DDC/IIC/MCU/EEPROM
Name
INTb
MCU_SCL
C
MCU_SDA
DDC0_SCL
DDC0_SDA
DDC1_SCL
DDC1_SDA
DDC2_SCL
DDC2_SDA
DDC3_SCL
DDC3_SDA
Misc. Pins
D
Name
X_IN
X_OUT
PLL_XFC_A
EXT_RSTb
PH1
PH2
reserved
Power Pins
Name
E
AVDD
PVDD
AVDD33
AVDD18
PVDD18
AVSS, PVSS
VDDE
VSSE
VDD
VSS
VDD_PLL
F
VSS_PLL
26
1
2
In/Out
OUT System Clock output for audio DAC (128/256/384/512 * FSampling_Clock. Connecting a pull-up
(logic 1) or pull-down (logic 0) resistor at this pin defines bit 4 of the slave IIC Address
OUT IIS SCK output for IIS audio port. Sampling clock output for DSD.
OUT IIS WS output for all IIS audio ports. DSD audio output port 0 (Right Channel).
OUT IIS SD output for audio port 0 or HBR audio output. DSD audio output port 0 (Left Channel).
OUT IIS SD output for audio port 1 or HBR audio output. DSD audio output port 1 (Right Channel).
OUT IIS SD output for audio port 2 or HBR audio output. DSD audio output port 1 (Left Channel).
OUT IIS SD output for audio port 3 or HBR audio output. DSD audio output port 2 (Right Channel).
OUT SPDIF output. DSD audio output port 2 (Left Channel).
OUT DSD audio output port 3 (Right Channel).
OUT DSD audio output port 3 (Left Channel).
OUT Audio Mute Output
In/Out
OUT Interrupt signal. Asserted when interrupt requests occur. This pin is open drain output when
programmed as active low and external pull-up resistor is needed. This pin is push-pull when
programmed as active high.
IN SCL signal for slave IIC port
IO SDA signal for slave IIC port
IN IIC SCL signal for HDMI Receiver DDC Port 0
IO IIC SDA signal for HDMI Receiver DDC Port 0
IN IIC SCL signal for HDMI Receiver DDC Port 1
IO IIC SDA signal for HDMI Receiver DDC Port 1
IN IIC SCL signal for HDMI Receiver DDC Port 2
IO IIC SDA signal for HDMI Receiver DDC Port 2
IN IIC SCL signal for HDMI Receiver DDC Port 3
IO IIC SDA signal for HDMI Receiver DDC Port 3
In/Out
Analog External Crystal Input, 18.432 MHz
Analog External Crystal Output, 18.432 MHz
Analog For connecting a capacitor to ground for on-chip PLL
IN External Reset input (Active Low) with internal weak pull-up.
Analog Connect with 2 kΩ pull-up resistor to 3V3.
Analog Connect with 2 kΩ pull-up resistor to 3V3.
IN Must be tied LOW for normal operation.
In/Out
PWR HDMI Receiver Analog Power (1.8 V)
PWR HDMI Receiver PLL Analog Power (1.8 V)
PWR HDMI Termination Power (3.3 V)
PWR HDMI Transmitter Analog Power (1.8 V)
PWR HDMI Transmitter PLL Analog Power (1.8 V)
GND Analog Ground
PWR I/O Power (3.3 V)
GND I/O Ground
PWR Internal Logic Power (1.8 V)
GND Logic Ground
GND Audio PLL Power (3.3 V)
GND Audio PLL Ground
2
3
Description
Description
Description
Description
HTP-071
3
4
4