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A
B
8
7
6
5
4
3
2
1
A
B
C
D
OPERATION/JACK SCHEMATIC DIAGRAM
OPEN/CLOSE
SW661_4
SKQNAED010
PLAY
SW662_4
SKQNAED010
STOP
SW665_4
SKQNAED010
SKIP_F
SW663_4
SKQNAED010
SKIP_R
SW664_4
SKQNAED010
OPERATION PCB
PCB030
VEX940
NOTE:
NOTE: THIS SCHEMATIC DIAGRAM IS THE LATEST AT THE TIME
THE DC VOLTAGE AT EACH PART WAS
MEASURED WITH THE DIGITAL TESTER
OF PRINTING AND SUBJECT TO CHANGE WITHOUT NOTICE
DURING PLAYBACK
C
D
E
F
(AV PCB)
FROM/TO
DISPLAY
(CP651)
CP661
IMSA-9604S-05Z13
S6
5
S5
4
CD651
K4
3
2L051101
K3
2
K2
1
S6
S5
K4
OPEN/CLOSE
SKIP/R
K3
STOP
SKIP/F
K2
PLAY
POWER
K1
E
F
G
H
M
RECORD LIST OF CHANGING
DATE
O/R NO.
CONTENTS
ISSUE
8
7
6
5
4
3
2
DET.CHKD BY
PCB NAME
DESCRIPTION
FUNCTION
K.MURATA
PAL/NTSC
OPERATION
VVX300A_F
1
CHKD BY
STANDARD
DWG.NO.
8
Rev.No:
5.0
W.PHON
IRAM
M2A1
OPJ1
10
ISSU
:
A
DESIGN BY
ORION ELECTRIC CO.LTD
MODEL
T.SARAWUT
M2A1-11A
DATE:
SECTION:
TEC-HQ
05/02/2001
DV-C4
DRAWN BY
DISTRIBUTE:
S.PRATUAN
PUBRICATION:
TEC-HQ SEC.
T1
G
H
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