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output signal to become TR_BR_FWD , an additional input signal for bridge address
matching logic. The TR_BR_FWD signal has the same timing as the MATCH signal and is
used to specifically indicate an address match with the effect on the A and C frame status
indicators as shown in Figure 9-2. Both the TR_BR_FWD and MATCH signal can be used
on the same implementation. Either input can be asserted any time from the second byte
of the SA up to and including the fourth byte of the FCS. The MATCH signal has the effect
of setting the A bit and overrides the TR_BR_FWD input.
RABORT OR
RABORT2
or TR_BR_FWD
Figure 9-2. CAM Interface Signals (EXT_DA_MATCH = 1)
Figure 9-3 shows the sequence of events on the CAM interface when receiving a token
frame for both normal and extended match mode. DA is asserted for one or two BYTCLKs
when a token is received. A two BYTCLK assertion is shown.
BYTCLK
RCDAT
LDADDR
ADDR16
Figure 9-3. CAM Interface Timing (Receiving Token
MOTOROLA
BYTCLK
DA
DA
RCDAT
JK FC
1
2
DA
ADDR16
MATCH
JK
FC TT
II
II
DA
UNRESTRICTED TOKEN
Frame for Normal and Extended Match Mode)
MC68838 USER'S MANUAL
VALID ASSERTION RANGE
DA
DA
DA
DA
SA
SA
Dn
3
4
5
6
1
2
VALID ASSERTION RANGE
JK FC TT
RESTRICTED TOKEN
FCS
FCS
FCS
FCS
1
2
3
4
II
II
9-3
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