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2.3 Host Interfaces
UART0 Interface
•
2-wire data transfer (RX, TX)
•
Programmable baud rate
(300 bps to 1.5 Mbps)
•
Data format (LSB first)
•
Data bit: (5-8 bit)
•
Parity bit: (0-3 bit)
•
Stop bit: (1-2 bit)
Further information
2.4 Peripheral Bus Interface
Embedded MCU and WLAN Radio (SoC)
Features
JTAG
General Purpose I/O
(GPIO) Interface
Wake Up 0 / 1
Further information
Product Specification Rev. 1.1
4.3.7 Host Interface Specification.
Characteristics
•
Standard JTAG interface
•
Defined GPIOs, I/O configured to either input or output (on/off)
•
GPIOs with LED status functionality (ready, heartbeat, IP-connectivity,
error and WLAN connectivity)
•
External signal for wake-up after shut-off mode
4.3.8 Peripheral Interface Specification.
UART1 Interface
•
4-wire data transfer
(RX, TX, RTS, CTS)
•
Programmable baud rate
(300 bps to 1.5 Mbps)
•
Data format (LSB first)
•
Data bit: (5-8 bit)
•
Parity bit: (0-3 bit)
•
Stop bit: (1-2 bit)
PAN9420 Wi-Fi Module
2 Overview
Page 11
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